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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 04/18] drm/i915/gen2: Add an ID for the display pipes power well
Date: Tue, 11 Jul 2017 20:01:50 +0300	[thread overview]
Message-ID: <20170711170150.GA12629@intel.com> (raw)
In-Reply-To: <1499352040-8819-5-git-send-email-imre.deak@intel.com>

On Thu, Jul 06, 2017 at 05:40:26PM +0300, Imre Deak wrote:
> Make the GEN2 power well ID assignment explicit for consistency.
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h         | 6 ++++++
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
>  2 files changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index e4135bd..ce90847 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1073,6 +1073,12 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
>   */
>  enum i915_power_well_id {
>  	/*
> +	 * GEN2

Just 830 actually. Rest of gen2 don't have this.

> +	 *  - custom power well
> +	 */
> +	I830_DISP_PW_PIPES = 0,
> +
> +	/*
>  	 * VLV/CHV
>  	 *  - PUNIT_REG_PWRGT_CTRL, PUNIT_REG_PWRGT_STATUS (PUNIT HAS v0.8)
>  	 */
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 9601b62..4a9d955 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -2036,6 +2036,7 @@ static struct i915_power_well i830_power_wells[] = {
>  		.name = "pipes",
>  		.domains = I830_PIPES_POWER_DOMAINS,
>  		.ops = &i830_pipes_power_well_ops,
> +		.id = I830_DISP_PW_PIPES,
>  	},
>  };
>  
> -- 
> 2.7.4

-- 
Ville Syrjälä
Intel OTC
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  parent reply	other threads:[~2017-07-11 17:01 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-06 14:40 [PATCH 00/23] drm/i915: Unify the HSW/BDW and GEN9+ power well code Imre Deak
2017-07-06 14:40 ` [PATCH 01/18] drm/i915/chv: Add unique power well ID for the pipe A power well Imre Deak
2017-07-11 16:31   ` Rodrigo Vivi
2017-07-06 14:40 ` [PATCH 02/18] drm/i915: Unify power well ID enums Imre Deak
2017-07-11 16:43   ` Rodrigo Vivi
2017-07-11 17:21     ` Rodrigo Vivi
2017-07-11 17:36       ` Imre Deak
2017-07-11 20:42   ` [PATCH v2 " Imre Deak
2017-07-06 14:40 ` [PATCH 03/18] drm/i915: Assign everywhere the always-on power well ID Imre Deak
2017-07-11 16:45   ` Rodrigo Vivi
2017-07-06 14:40 ` [PATCH 04/18] drm/i915/gen2: Add an ID for the display pipes power well Imre Deak
2017-07-11 16:50   ` Rodrigo Vivi
2017-07-11 17:01   ` Ville Syrjälä [this message]
2017-07-11 20:42   ` [PATCH v2 " Imre Deak
2017-07-06 14:40 ` [PATCH 05/18] drm/i915/hsw, bdw: Add an ID for the global display " Imre Deak
2017-07-11 17:08   ` Rodrigo Vivi
2017-07-11 20:42   ` [PATCH v2 " Imre Deak
2017-07-06 14:40 ` [PATCH 06/18] drm/i915: Check for duplicated power well IDs Imre Deak
2017-07-07 14:39   ` [PATCH v2 " Imre Deak
2017-07-11 17:08     ` Ville Syrjälä
2017-07-11 20:42   ` [PATCH v3 " Imre Deak
2017-07-20 13:08     ` Arkadiusz Hiler
2017-07-06 14:40 ` [PATCH 07/18] drm/i915/bxt, glk: Give a proper name to the power well struct phy field Imre Deak
2017-07-20 13:11   ` Arkadiusz Hiler
2017-07-06 14:40 ` [PATCH 08/18] drm/i915/gen9+: Remove redundant power well state assert during enabling Imre Deak
2017-07-21 10:53   ` Arkadiusz Hiler
2017-07-06 14:40 ` [PATCH 09/18] drm/i915/gen9+: Remove redundant state check during power well toggling Imre Deak
2017-07-21 11:14   ` Arkadiusz Hiler
2017-07-21 11:25     ` Imre Deak
2017-07-21 11:32       ` Arkadiusz Hiler
2017-07-21 13:24         ` Arkadiusz Hiler
2017-07-06 14:40 ` [PATCH 10/18] drm/i915/hsw, bdw: " Imre Deak
2017-07-21 11:39   ` Arkadiusz Hiler
2017-07-06 14:40 ` [PATCH 11/18] drm/i915/hsw, bdw: Split power well set to enable/disable helpers Imre Deak
2017-07-21 11:51   ` Arkadiusz Hiler
2017-07-06 14:40 ` [PATCH 12/18] drm/i915/hsw+: Unify the hsw/bdw and gen9+ power well req/state macros Imre Deak
2017-07-21 12:39   ` Arkadiusz Hiler
2017-07-06 14:40 ` [PATCH 13/18] drm/i915/hsw, bdw: Add irq_pipe_mask, has_vga power well attributes Imre Deak
2017-07-11 17:02   ` Ville Syrjälä
2017-07-11 20:42   ` [PATCH v2 " Imre Deak
2017-07-12 15:54   ` [PATCH v3 " Imre Deak
2017-07-21 12:50     ` Arkadiusz Hiler
2017-07-06 14:40 ` [PATCH 14/18] drm/i915/hsw, bdw: Wait for the power well disabled state Imre Deak
2017-07-21 13:00   ` Arkadiusz Hiler
2017-07-06 14:40 ` [PATCH 15/18] drm/i915/hsw+: Add has_fuses power well attribute Imre Deak
2017-07-11 17:05   ` Ville Syrjälä
2017-07-11 17:22     ` Imre Deak
2017-07-11 17:37       ` Ville Syrjälä
2017-07-11 17:49         ` Imre Deak
2017-07-11 20:42   ` [PATCH v2 " Imre Deak
2017-07-21 13:10     ` Arkadiusz Hiler
2017-07-06 14:40 ` [PATCH 16/18] drm/i915/gen9+: Unify the HSW/BDW and GEN9+ power well helpers Imre Deak
2017-07-11 20:42   ` [PATCH v2 " Imre Deak
2017-07-21 13:22     ` Arkadiusz Hiler
2017-07-06 14:40 ` [PATCH 17/18] drm/i915: Move hsw_power_well_enable() next to the rest of HSW helpers Imre Deak
2017-07-21 13:29   ` Arkadiusz Hiler
2017-07-06 14:40 ` [PATCH 18/18] drm/i915: Gather all the power well->domain mappings to one place Imre Deak
2017-07-21 13:39   ` Arkadiusz Hiler
2017-07-06 15:51 ` ✓ Fi.CI.BAT: success for drm/i915: Unify the HSW/BDW and GEN9+ power well code Patchwork
2017-07-07 14:59 ` ✓ Fi.CI.BAT: success for drm/i915: Unify the HSW/BDW and GEN9+ power well code (rev2) Patchwork
2017-07-11 21:01 ` ✗ Fi.CI.BAT: warning for drm/i915: Unify the HSW/BDW and GEN9+ power well code (rev8) Patchwork
2017-07-12 16:17 ` ✗ Fi.CI.BAT: failure for drm/i915: Unify the HSW/BDW and GEN9+ power well code (rev9) Patchwork
2017-07-12 17:17   ` Imre Deak
2017-07-24 14:32     ` Imre Deak

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