From: Manasi Navare <manasi.d.navare@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>,
intel-gfx@lists.freedesktop.org,
Paulo Zanoni <paulo.r.zanoni@intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH v3 4/4] drm/i915/edp: Be less aggressive about changing link config on eDP
Date: Wed, 12 Jul 2017 14:53:36 -0700 [thread overview]
Message-ID: <20170712215336.GD20790@intel.com> (raw)
In-Reply-To: <149989548397.28319.1796907790517523204@mail.alporthouse.com>
On Wed, Jul 12, 2017 at 10:38:03PM +0100, Chris Wilson wrote:
> Quoting Manasi Navare (2017-07-12 22:36:49)
> > On Wed, Jul 12, 2017 at 12:16:13AM +0100, Chris Wilson wrote:
> > > Quoting Jim Bride (2017-07-11 23:19:56)
> > > > @@ -174,21 +176,25 @@ intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp)
> > > >
> > > > if (!intel_dp_get_link_status(intel_dp, link_status)) {
> > > > DRM_ERROR("failed to get link status\n");
> > > > + intel_dp->train_set_valid = false;
> > > > return false;
> > > > }
> > > >
> > > > if (drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) {
> > > > DRM_DEBUG_KMS("clock recovery OK\n");
> > > > + intel_dp->train_set_valid = is_edp(intel_dp);
> > >
> > > Ouch, that was hard to spot amongst the decoys. How about setting
> > > intel_dp->train_set_valid = false at the very start of training, and
> > > only on success set it to true, something like
> > >
> >
> > Or like I suggested, just set train_set_valid to false in the
> > failure_handling and set it to true only on success.
>
> It just looked a little crowded in the failure_handling: whereas at the
> start of the function, there was plenty of whitespace for it to stand
> out. That was all I was thinking.
> -Chris
But at the beginning of the function, it is anyway set to False since
intel_dp_init_connector sets it to false.
So we dont need to again set it to false at the beginning of the function right?
Then we only set it to true when it succeeds so after 1 successful link training
it will be set to true.
And now since this code will also be used fro DP case, we need to make sure
we set this to false in failure handling so that it resets link train during
link train fallback.
Makes sense?
Manasi
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next prev parent reply other threads:[~2017-07-12 21:46 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-11 22:19 [PATCH v3 0/4] Kernel PSR Fix-ups Jim Bride
2017-07-11 22:19 ` [PATCH v3 1/4] drm/i915/psr: Clean-up intel_enable_source_psr1() Jim Bride
2017-07-12 8:47 ` Dhinakaran Pandiyan
2017-07-12 10:05 ` Chris Wilson
2017-07-14 9:34 ` Jani Nikula
2017-08-03 21:48 ` Jim Bride
2017-08-04 7:29 ` Jani Nikula
2017-08-07 15:55 ` Jim Bride
2017-08-07 17:17 ` Jim Bride
2017-07-11 22:19 ` [PATCH v3 2/4] drm/i915/psr: Account for sink CRC raciness on some panels Jim Bride
2017-07-11 23:37 ` Vivi, Rodrigo
2017-07-12 9:42 ` Dhinakaran Pandiyan
2017-07-14 9:46 ` Jani Nikula
2017-07-14 16:04 ` Jim Bride
2017-07-11 22:19 ` [PATCH v3 3/4] drm/i915/edp: Allow alternate fixed mode for eDP if available Jim Bride
2017-07-11 23:27 ` Chris Wilson
2017-07-12 19:59 ` Jim Bride
2017-07-11 22:19 ` [PATCH v3 4/4] drm/i915/edp: Be less aggressive about changing link config on eDP Jim Bride
2017-07-11 23:16 ` Chris Wilson
2017-07-12 21:36 ` Manasi Navare
2017-07-12 21:38 ` Chris Wilson
2017-07-12 21:53 ` Manasi Navare [this message]
2017-07-12 22:01 ` Jim Bride
2017-07-12 21:28 ` Manasi Navare
2017-07-11 22:48 ` ✗ Fi.CI.BAT: failure for Kernel PSR Fix-ups Patchwork
2017-07-18 21:34 ` [PATCH v4 1/4] drm/i915/psr: Clean-up intel_enable_source_psr1() Jim Bride
2017-07-18 21:34 ` [PATCH v4 2/4] drm/i915/psr: Account for sink CRC raciness on some panels Jim Bride
2017-08-03 18:07 ` Rodrigo Vivi
2017-08-04 18:38 ` Pandiyan, Dhinakaran
2017-08-07 15:58 ` Jim Bride
2017-07-18 21:34 ` [PATCH v4 3/4] drm/i915/edp: Be less aggressive about changing link config on eDP Jim Bride
2017-07-18 21:34 ` [PATCH v4 4/4] drm/i915/edp: Allow alternate fixed mode for eDP if available Jim Bride
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