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From: Jim Bride <jim.bride@linux.intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>,
	Wayne Boyer <wayne.boyer@intel.com>,
	intel-gfx@lists.freedesktop.org,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH v3 1/4] drm/i915/psr: Clean-up intel_enable_source_psr1()
Date: Mon, 7 Aug 2017 08:55:00 -0700	[thread overview]
Message-ID: <20170807155500.GA7597@shiv> (raw)
In-Reply-To: <8760e3hjtu.fsf@nikula.org>

On Fri, Aug 04, 2017 at 10:29:33AM +0300, Jani Nikula wrote:
> On Thu, 03 Aug 2017, Jim Bride <jim.bride@linux.intel.com> wrote:
> > On Fri, Jul 14, 2017 at 12:34:28PM +0300, Jani Nikula wrote:
> >> On Wed, 12 Jul 2017, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> >> > Quoting Dhinakaran Pandiyan (2017-07-12 09:47:25)
> >> >> On Tuesday, July 11, 2017 3:19:53 PM PDT Jim Bride wrote:
> >> >> > On SKL+ there is a bit in SRD_CTL that software is not supposed to
> >> >> > modify, but we currently clobber that bit when we enable PSR.  In
> >> >> > order to preserve the value of that bit, go ahead and read SRD_CTL 
> >> >> 
> >> >> And which bit is that?
> >
> > Bit 29 (Context restore to PSR Active) in SRD_CTL.  I'll add it to the
> > commit message.  It's worth noting that the bit is not technically
> > reserved, but rather that SW is not allowed to change it.
> >
> >> >
> >> > I think we would all be happier with keeping the explicit construction
> >> > (and a smaller patch) if we used
> >> >
> >> > 	val |= I915_READ(EDP_PSR_CTL) & EDP_PSR_CTL_RSVD_MASK;
> >> 
> >> Agreed. Avoid read-modify-write as much as possible.
> >
> > I can do this if everyone thinks it's the thing to do, but it
> > does open us up to a similar class of bug (B-Spec restricting mods
> > to a bit / bit range after initial support for a platform was added)
> > in the future.  IMHO the code as written is safer.
> 
> Chris' suggestion preserves the restricted bits that must remain the
> same, while initializing everything else. Instead of only changing the
> bits we must change, only preserve the bits we must not change. Sorry if
> I wasn't clear with the "as much as possible" part there.

I think I followed you.  What I was trying to highlight is that the
patch as written doesn't touch anything other than what we explicitly
need to initialize.  While Chris' suggestion is much more terse, it
leaves us open to another bit being flagged out as 'software
shouldn't change' and we'd have a similar bug again.  The patch as
written doesn't expose us to that situation.  I'm happy to go with
Chris' suggestion if everyone still thinks it's the right thing, but
I wanted to highlight that it's not entirely equivalent to what was
in the original patch and in my opinion it's less safe than the
original patch.

> Preserving the restricted bits is a functional change, and the subject
> of this patch does not reflect that. When I look at the logs, I pretty
> much expect clean up commits to be non-functional. There are some areas
> where I'd look the other way, but PSR is something where we must
> carefully split up the patches and write the commit messages diligently,
> because I know we will be spending time debugging this code and reading
> the logs.

I will remove the word 'clean-up' and reword the subject, independent
of what we decide relative to the two approaches described above.
The body of the commit message (IMHO) does a good job (and I'll add
the specific bit in SRD_CTL to the body also) of describing the
functional changes that the patch makes.

Jim

> BR,
> Jani.
> 
> 
> 
> >
> > Jim
> >
> >
> >> 
> >> BR,
> >> Jani.
> >> 
> >> 
> >> -- 
> >> Jani Nikula, Intel Open Source Technology Center
> >> _______________________________________________
> >> Intel-gfx mailing list
> >> Intel-gfx@lists.freedesktop.org
> >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center
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  reply	other threads:[~2017-08-07 15:57 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-11 22:19 [PATCH v3 0/4] Kernel PSR Fix-ups Jim Bride
2017-07-11 22:19 ` [PATCH v3 1/4] drm/i915/psr: Clean-up intel_enable_source_psr1() Jim Bride
2017-07-12  8:47   ` Dhinakaran Pandiyan
2017-07-12 10:05     ` Chris Wilson
2017-07-14  9:34       ` Jani Nikula
2017-08-03 21:48         ` Jim Bride
2017-08-04  7:29           ` Jani Nikula
2017-08-07 15:55             ` Jim Bride [this message]
2017-08-07 17:17               ` Jim Bride
2017-07-11 22:19 ` [PATCH v3 2/4] drm/i915/psr: Account for sink CRC raciness on some panels Jim Bride
2017-07-11 23:37   ` Vivi, Rodrigo
2017-07-12  9:42   ` Dhinakaran Pandiyan
2017-07-14  9:46   ` Jani Nikula
2017-07-14 16:04     ` Jim Bride
2017-07-11 22:19 ` [PATCH v3 3/4] drm/i915/edp: Allow alternate fixed mode for eDP if available Jim Bride
2017-07-11 23:27   ` Chris Wilson
2017-07-12 19:59     ` Jim Bride
2017-07-11 22:19 ` [PATCH v3 4/4] drm/i915/edp: Be less aggressive about changing link config on eDP Jim Bride
2017-07-11 23:16   ` Chris Wilson
2017-07-12 21:36     ` Manasi Navare
2017-07-12 21:38       ` Chris Wilson
2017-07-12 21:53         ` Manasi Navare
2017-07-12 22:01           ` Jim Bride
2017-07-12 21:28   ` Manasi Navare
2017-07-11 22:48 ` ✗ Fi.CI.BAT: failure for Kernel PSR Fix-ups Patchwork
2017-07-18 21:34 ` [PATCH v4 1/4] drm/i915/psr: Clean-up intel_enable_source_psr1() Jim Bride
2017-07-18 21:34 ` [PATCH v4 2/4] drm/i915/psr: Account for sink CRC raciness on some panels Jim Bride
2017-08-03 18:07   ` Rodrigo Vivi
2017-08-04 18:38     ` Pandiyan, Dhinakaran
2017-08-07 15:58       ` Jim Bride
2017-07-18 21:34 ` [PATCH v4 3/4] drm/i915/edp: Be less aggressive about changing link config on eDP Jim Bride
2017-07-18 21:34 ` [PATCH v4 4/4] drm/i915/edp: Allow alternate fixed mode for eDP if available Jim Bride

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