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* [PATCH] drm/i915/cnl: Add slice and subslice information to debugfs.
@ 2017-08-09 20:07 Rodrigo Vivi
  2017-08-09 20:31 ` ✓ Fi.CI.BAT: success for " Patchwork
  2017-08-10 11:36 ` [PATCH] " Joonas Lahtinen
  0 siblings, 2 replies; 4+ messages in thread
From: Rodrigo Vivi @ 2017-08-09 20:07 UTC (permalink / raw)
  To: intel-gfx; +Cc: Rodrigo Vivi

A missing part to EU slice power gating is the
debugfs interface. This patch actually should have been
squashed to the initial EU slice power gating one.

v2: Initial patch was merged without this part.

Fixes: c7ae7e9ab207 ("drm/i915/cnl: Configure EU slice power gating.")
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 6480897bcaf4..329fb3649dc3 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -4560,7 +4560,7 @@ static void gen9_sseu_device_status(struct drm_i915_private *dev_priv,
 
 		sseu->slice_mask |= BIT(s);
 
-		if (IS_GEN9_BC(dev_priv))
+		if (IS_GEN9_BC(dev_priv) || IS_CANNONLAKE(dev_priv))
 			sseu->subslice_mask =
 				INTEL_INFO(dev_priv)->sseu.subslice_mask;
 
-- 
2.13.2

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end of thread, other threads:[~2017-08-10 21:13 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-08-09 20:07 [PATCH] drm/i915/cnl: Add slice and subslice information to debugfs Rodrigo Vivi
2017-08-09 20:31 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-08-10 11:36 ` [PATCH] " Joonas Lahtinen
2017-08-10 21:13   ` Rodrigo Vivi

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