* [PATCH v10 0/3] vGPU full 48bit ppgtt support
@ 2017-08-14 7:41 Zhenyu Wang
2017-08-14 7:41 ` [PATCH v10 1/3] drm/i915: Disconnect 32 and 48 bit ppGTT support Zhenyu Wang
` (4 more replies)
0 siblings, 5 replies; 9+ messages in thread
From: Zhenyu Wang @ 2017-08-14 7:41 UTC (permalink / raw)
To: intel-gfx; +Cc: intel-gvt-dev
Just refresh against Joonas's disconnect 32/48bit ppgtt support patch
and give full view on this series. If ok, I'll include them for gvt-next
pull.
Thanks
Joonas Lahtinen (1):
drm/i915: Disconnect 32 and 48 bit ppGTT support
Tina Zhang (2):
drm/i915: Enable guest i915 full ppgtt functionality
drm/i915/gvt: Fix guest i915 full ppgtt blocking issue
drivers/gpu/drm/i915/gvt/gtt.c | 45 +++++++++++++++++++++++--------------
drivers/gpu/drm/i915/gvt/vgpu.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_gem_gtt.c | 17 +++++++++-----
drivers/gpu/drm/i915/i915_pvinfo.h | 8 ++++++-
drivers/gpu/drm/i915/i915_vgpu.c | 7 ++++++
drivers/gpu/drm/i915/i915_vgpu.h | 3 +++
7 files changed, 58 insertions(+), 24 deletions(-)
--
2.14.0
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^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH v10 1/3] drm/i915: Disconnect 32 and 48 bit ppGTT support 2017-08-14 7:41 [PATCH v10 0/3] vGPU full 48bit ppgtt support Zhenyu Wang @ 2017-08-14 7:41 ` Zhenyu Wang 2017-08-14 10:33 ` Chris Wilson 2017-08-14 7:41 ` [PATCH v10 2/3] drm/i915: Enable guest i915 full ppgtt functionality Zhenyu Wang ` (3 subsequent siblings) 4 siblings, 1 reply; 9+ messages in thread From: Zhenyu Wang @ 2017-08-14 7:41 UTC (permalink / raw) To: intel-gfx; +Cc: intel-gvt-dev From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Configurations like virtualized environments may support only 48 bit ppGTT without supporting 32 bit ppGTT. Support this by disconnecting the relationship of the two feature bits. Cc: Tina Zhang <tina.zhang@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index 10aa7762d9a6..a5eada1b93c5 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -180,10 +180,15 @@ int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv, return 0; } - if (INTEL_GEN(dev_priv) >= 8 && i915.enable_execlists && has_full_ppgtt) - return has_full_48bit_ppgtt ? 3 : 2; - else - return has_aliasing_ppgtt ? 1 : 0; + if (INTEL_GEN(dev_priv) >= 8 && i915.enable_execlists) { + if (has_full_48bit_ppgtt) + return 3; + + if (has_full_ppgtt) + return 2; + } + + return has_aliasing_ppgtt ? 1 : 0; } static int ppgtt_bind_vma(struct i915_vma *vma, -- 2.14.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v10 1/3] drm/i915: Disconnect 32 and 48 bit ppGTT support 2017-08-14 7:41 ` [PATCH v10 1/3] drm/i915: Disconnect 32 and 48 bit ppGTT support Zhenyu Wang @ 2017-08-14 10:33 ` Chris Wilson 0 siblings, 0 replies; 9+ messages in thread From: Chris Wilson @ 2017-08-14 10:33 UTC (permalink / raw) To: Zhenyu Wang, intel-gfx; +Cc: intel-gvt-dev Quoting Zhenyu Wang (2017-08-14 08:41:38) > From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > > Configurations like virtualized environments may support only 48 bit > ppGTT without supporting 32 bit ppGTT. Support this by disconnecting > the relationship of the two feature bits. > > Cc: Tina Zhang <tina.zhang@intel.com> > Cc: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Zhi Wang <zhi.a.wang@intel.com> > Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> I was under the impression that the previous conflicting patch was already en route. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v10 2/3] drm/i915: Enable guest i915 full ppgtt functionality 2017-08-14 7:41 [PATCH v10 0/3] vGPU full 48bit ppgtt support Zhenyu Wang 2017-08-14 7:41 ` [PATCH v10 1/3] drm/i915: Disconnect 32 and 48 bit ppGTT support Zhenyu Wang @ 2017-08-14 7:41 ` Zhenyu Wang 2017-08-14 7:41 ` [PATCH v10 3/3] drm/i915/gvt: Fix guest i915 full ppgtt blocking issue Zhenyu Wang ` (2 subsequent siblings) 4 siblings, 0 replies; 9+ messages in thread From: Zhenyu Wang @ 2017-08-14 7:41 UTC (permalink / raw) To: intel-gfx; +Cc: intel-gvt-dev From: Tina Zhang <tina.zhang@intel.com> Enable the guest i915 full ppgtt functionality when host can provide this capability. vgt_caps is introduced to guest i915 driver to get the vgpu capabilities from the device model. VGT_CPAS_FULL_PPGTT is one of the capabilities type to let guest i915 dirver know that the guest i915 full ppgtt is supported by device model. Notice that the minor version of pvinfo isn't bumped because of this vgt_caps introduction, due to older guest would be broken by simply increasing the pvinfo version. Although the pvinfo minor version doesn't increase, the compatibility won't be blocked. The compatibility is ensured by checking the value of caps field in pvinfo. Zero means no full ppgtt support and BIT(2) means this feature is provided. Changes since v1: - Use u32 instead of uint32_t (Joonas) - Move VGT_CAPS_FULL_PPGTT introduction to this patch and use #define instead of enum (Joonas) - Rewrite the vgpu full ppgtt capability checking logic. (Joonas) - Some coding style refine. (Joonas) Changes since v2: - Divide the whole patch set into two separate patch series, with one patch in i915 side to check guest i915 full ppgtt capability and enable it when this capability is supported by the device model, and the other one in gvt side which fixs the blocking issue and enables the device model to provide the capability to guest. And this patch focuses on guest i915 side. (Joonas) - Change the title from "introduce vgt_caps to pvinfo" to "Enable guest i915 full ppgtt functionality". (Tina) Change since v3: - Add some comments about pvinfo caps and version. (Joonas) Change since v4: - Tested by Tina Zhang. Change since v5: - Add limitation about supporting 32bit full ppgtt. Change since v6: - Change the fallback to 48bit full ppgtt if i915.ppgtt_enable=2. (Zhenyu) Change in v9: - Remove the fixme comment due to no plan for 32bit full ppgtt support. (Zhenyu) - Reorder the patch-set to fix compiling issue with git-bisect. (Zhenyu) - Add print log when forcing guest 48bit full ppgtt. (Zhenyu) v10: - Update against Joonas's has_full_ppgtt and has_full_48bit_ppgtt disconnect change. (Zhenyu) Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> # in v2 Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Tina Zhang <tina.zhang@intel.com> Signed-off-by: Tina Zhang <tina.zhang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++-- drivers/gpu/drm/i915/i915_pvinfo.h | 8 +++++++- drivers/gpu/drm/i915/i915_vgpu.c | 7 +++++++ drivers/gpu/drm/i915/i915_vgpu.h | 3 +++ 5 files changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index d63645a521c4..c38f46fd1fba 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1902,6 +1902,7 @@ struct i915_workarounds { struct i915_virtual_gpu { bool active; + u32 caps; }; /* used in computing the new watermarks state */ diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c index a5eada1b93c5..ef1881e256f4 100644 --- a/drivers/gpu/drm/i915/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c @@ -144,9 +144,9 @@ int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv, has_full_48bit_ppgtt = dev_priv->info.has_full_48bit_ppgtt; if (intel_vgpu_active(dev_priv)) { - /* emulation is too hard */ + /* GVT-g has no support for 32bit ppgtt */ has_full_ppgtt = false; - has_full_48bit_ppgtt = false; + has_full_48bit_ppgtt = intel_vgpu_has_full_48bit_ppgtt(dev_priv); } if (!has_aliasing_ppgtt) diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h b/drivers/gpu/drm/i915/i915_pvinfo.h index 2cfe96d3e5d1..0679a58cdbae 100644 --- a/drivers/gpu/drm/i915/i915_pvinfo.h +++ b/drivers/gpu/drm/i915/i915_pvinfo.h @@ -49,12 +49,18 @@ enum vgt_g2v_type { VGT_G2V_MAX, }; +/* + * VGT capabilities type + */ +#define VGT_CAPS_FULL_48BIT_PPGTT BIT(2) + struct vgt_if { u64 magic; /* VGT_MAGIC */ u16 version_major; u16 version_minor; u32 vgt_id; /* ID of vGT instance */ - u32 rsv1[12]; /* pad to offset 0x40 */ + u32 vgt_caps; /* VGT capabilities */ + u32 rsv1[11]; /* pad to offset 0x40 */ /* * Data structure to describe the balooning info of resources. * Each VM can only have one portion of continuous area for now. diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c index cf7a958e4d3c..5fe9f3f39467 100644 --- a/drivers/gpu/drm/i915/i915_vgpu.c +++ b/drivers/gpu/drm/i915/i915_vgpu.c @@ -75,10 +75,17 @@ void i915_check_vgpu(struct drm_i915_private *dev_priv) return; } + dev_priv->vgpu.caps = __raw_i915_read32(dev_priv, vgtif_reg(vgt_caps)); + dev_priv->vgpu.active = true; DRM_INFO("Virtual GPU for Intel GVT-g detected.\n"); } +bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv) +{ + return dev_priv->vgpu.caps & VGT_CAPS_FULL_48BIT_PPGTT; +} + struct _balloon_info_ { /* * There are up to 2 regions per mappable/unmappable graphic diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h index 3c3b2d24e830..b72bd2956b70 100644 --- a/drivers/gpu/drm/i915/i915_vgpu.h +++ b/drivers/gpu/drm/i915/i915_vgpu.h @@ -27,6 +27,9 @@ #include "i915_pvinfo.h" void i915_check_vgpu(struct drm_i915_private *dev_priv); + +bool intel_vgpu_has_full_48bit_ppgtt(struct drm_i915_private *dev_priv); + int intel_vgt_balloon(struct drm_i915_private *dev_priv); void intel_vgt_deballoon(struct drm_i915_private *dev_priv); -- 2.14.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v10 3/3] drm/i915/gvt: Fix guest i915 full ppgtt blocking issue 2017-08-14 7:41 [PATCH v10 0/3] vGPU full 48bit ppgtt support Zhenyu Wang 2017-08-14 7:41 ` [PATCH v10 1/3] drm/i915: Disconnect 32 and 48 bit ppGTT support Zhenyu Wang 2017-08-14 7:41 ` [PATCH v10 2/3] drm/i915: Enable guest i915 full ppgtt functionality Zhenyu Wang @ 2017-08-14 7:41 ` Zhenyu Wang 2017-08-14 7:58 ` ✓ Fi.CI.BAT: success for vGPU full 48bit ppgtt support Patchwork 2017-08-14 10:09 ` [PATCH v10 0/3] " Zhang, Tina 4 siblings, 0 replies; 9+ messages in thread From: Zhenyu Wang @ 2017-08-14 7:41 UTC (permalink / raw) To: intel-gfx; +Cc: intel-gvt-dev From: Tina Zhang <tina.zhang@intel.com> Guest i915 full ppgtt functionality was blocking by an issue, which would lead to gpu hardware hang. Guest i915 driver may update the ppgtt table just before this workload is going to be submitted to the hardware by device model. This case wasn't handled well by device model before, due to the small time window between removing old ppgtt entry and adding the new one. Errors occur when the workload is executed by hardware during that small time window. This patch is to remove this time window by adding the new ppgtt entry first and then remove the old one. Changes in v2: - Move VGT_CAPS_FULL_PPGTT introduction to patch 2/4. (Joonas) Changes since v2: - Divide the whole patch set into two separate patch series, with one patch in i915 side to check guest i915 full ppgtt capability and enable it when this capability is supported by the device model, and the other one in gvt side which fixs the blocking issue and enables the device model to provide the capability to guest. And this patch focuses on gvt side. (Joonas) - Change the title from "reorder the shadow ppgtt update process by adding entry first" to "Fix guest i915 full ppgtt blocking issue". (Tina) Changes since v3: - Rebase to the latest branch. Changes since v4: - Tested by Tina Zhang. Changes since v5: - Rebase to the latest branch. v6: - Update full 48bit ppgtt definition Cc: Tina Zhang <tina.zhang@intel.com> Signed-off-by: Tina Zhang <tina.zhang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> --- drivers/gpu/drm/i915/gvt/gtt.c | 45 +++++++++++++++++++++++++---------------- drivers/gpu/drm/i915/gvt/vgpu.c | 1 + 2 files changed, 29 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c index f862681c70d1..e6dfc3331f4b 100644 --- a/drivers/gpu/drm/i915/gvt/gtt.c +++ b/drivers/gpu/drm/i915/gvt/gtt.c @@ -989,29 +989,26 @@ static int ppgtt_populate_shadow_page(struct intel_vgpu_ppgtt_spt *spt) } static int ppgtt_handle_guest_entry_removal(struct intel_vgpu_guest_page *gpt, - unsigned long index) + struct intel_gvt_gtt_entry *se, unsigned long index) { struct intel_vgpu_ppgtt_spt *spt = guest_page_to_ppgtt_spt(gpt); struct intel_vgpu_shadow_page *sp = &spt->shadow_page; struct intel_vgpu *vgpu = spt->vgpu; struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; - struct intel_gvt_gtt_entry e; int ret; - ppgtt_get_shadow_entry(spt, &e, index); - - trace_gpt_change(spt->vgpu->id, "remove", spt, sp->type, e.val64, + trace_gpt_change(spt->vgpu->id, "remove", spt, sp->type, se->val64, index); - if (!ops->test_present(&e)) + if (!ops->test_present(se)) return 0; - if (ops->get_pfn(&e) == vgpu->gtt.scratch_pt[sp->type].page_mfn) + if (ops->get_pfn(se) == vgpu->gtt.scratch_pt[sp->type].page_mfn) return 0; - if (gtt_type_is_pt(get_next_pt_type(e.type))) { + if (gtt_type_is_pt(get_next_pt_type(se->type))) { struct intel_vgpu_ppgtt_spt *s = - ppgtt_find_shadow_page(vgpu, ops->get_pfn(&e)); + ppgtt_find_shadow_page(vgpu, ops->get_pfn(se)); if (!s) { gvt_vgpu_err("fail to find guest page\n"); ret = -ENXIO; @@ -1021,12 +1018,10 @@ static int ppgtt_handle_guest_entry_removal(struct intel_vgpu_guest_page *gpt, if (ret) goto fail; } - ops->set_pfn(&e, vgpu->gtt.scratch_pt[sp->type].page_mfn); - ppgtt_set_shadow_entry(spt, &e, index); return 0; fail: gvt_vgpu_err("fail: shadow page %p guest entry 0x%llx type %d\n", - spt, e.val64, e.type); + spt, se->val64, se->type); return ret; } @@ -1246,22 +1241,37 @@ static int ppgtt_handle_guest_write_page_table( { struct intel_vgpu_ppgtt_spt *spt = guest_page_to_ppgtt_spt(gpt); struct intel_vgpu *vgpu = spt->vgpu; + int type = spt->shadow_page.type; struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; + struct intel_gvt_gtt_entry se; int ret; int new_present; new_present = ops->test_present(we); - ret = ppgtt_handle_guest_entry_removal(gpt, index); - if (ret) - goto fail; + /* + * Adding the new entry first and then removing the old one, that can + * guarantee the ppgtt table is validated during the window between + * adding and removal. + */ + ppgtt_get_shadow_entry(spt, &se, index); if (new_present) { ret = ppgtt_handle_guest_entry_add(gpt, we, index); if (ret) goto fail; } + + ret = ppgtt_handle_guest_entry_removal(gpt, &se, index); + if (ret) + goto fail; + + if (!new_present) { + ops->set_pfn(&se, vgpu->gtt.scratch_pt[type].page_mfn); + ppgtt_set_shadow_entry(spt, &se, index); + } + return 0; fail: gvt_vgpu_err("fail: shadow page %p guest entry 0x%llx type %d.\n", @@ -1333,7 +1343,7 @@ static int ppgtt_handle_guest_write_page_table_bytes(void *gp, struct intel_vgpu *vgpu = spt->vgpu; struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops; const struct intel_gvt_device_info *info = &vgpu->gvt->device_info; - struct intel_gvt_gtt_entry we; + struct intel_gvt_gtt_entry we, se; unsigned long index; int ret; @@ -1349,7 +1359,8 @@ static int ppgtt_handle_guest_write_page_table_bytes(void *gp, return ret; } else { if (!test_bit(index, spt->post_shadow_bitmap)) { - ret = ppgtt_handle_guest_entry_removal(gpt, index); + ppgtt_get_shadow_entry(spt, &se, index); + ret = ppgtt_handle_guest_entry_removal(gpt, &se, index); if (ret) return ret; } diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c index 5b44d123bf24..5896ead8529e 100644 --- a/drivers/gpu/drm/i915/gvt/vgpu.c +++ b/drivers/gpu/drm/i915/gvt/vgpu.c @@ -43,6 +43,7 @@ void populate_pvinfo_page(struct intel_vgpu *vgpu) vgpu_vreg(vgpu, vgtif_reg(version_minor)) = 0; vgpu_vreg(vgpu, vgtif_reg(display_ready)) = 0; vgpu_vreg(vgpu, vgtif_reg(vgt_id)) = vgpu->id; + vgpu_vreg(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_FULL_48BIT_PPGTT; vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) = vgpu_aperture_gmadr_base(vgpu); vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.size)) = -- 2.14.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for vGPU full 48bit ppgtt support 2017-08-14 7:41 [PATCH v10 0/3] vGPU full 48bit ppgtt support Zhenyu Wang ` (2 preceding siblings ...) 2017-08-14 7:41 ` [PATCH v10 3/3] drm/i915/gvt: Fix guest i915 full ppgtt blocking issue Zhenyu Wang @ 2017-08-14 7:58 ` Patchwork 2017-08-14 10:09 ` [PATCH v10 0/3] " Zhang, Tina 4 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2017-08-14 7:58 UTC (permalink / raw) To: Zhenyu Wang; +Cc: intel-gfx == Series Details == Series: vGPU full 48bit ppgtt support URL : https://patchwork.freedesktop.org/series/28741/ State : success == Summary == Series 28741v1 vGPU full 48bit ppgtt support https://patchwork.freedesktop.org/api/1.0/series/28741/revisions/1/mbox/ Test kms_cursor_legacy: Subgroup basic-busy-flip-before-cursor-atomic: fail -> PASS (fi-snb-2600) fdo#100215 Test kms_flip: Subgroup basic-flip-vs-modeset: skip -> PASS (fi-skl-x1585l) fdo#101781 fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215 fdo#101781 https://bugs.freedesktop.org/show_bug.cgi?id=101781 fi-bdw-5557u total:279 pass:268 dwarn:0 dfail:0 fail:0 skip:11 time:461s fi-bdw-gvtdvm total:279 pass:265 dwarn:0 dfail:0 fail:0 skip:14 time:440s fi-blb-e6850 total:279 pass:224 dwarn:1 dfail:0 fail:0 skip:54 time:354s fi-bsw-n3050 total:279 pass:243 dwarn:0 dfail:0 fail:0 skip:36 time:544s fi-bxt-j4205 total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:516s fi-byt-j1900 total:279 pass:254 dwarn:1 dfail:0 fail:0 skip:24 time:523s fi-byt-n2820 total:279 pass:250 dwarn:1 dfail:0 fail:0 skip:28 time:514s fi-glk-2a total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:600s fi-hsw-4770 total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:445s fi-hsw-4770r total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:418s fi-ilk-650 total:279 pass:229 dwarn:0 dfail:0 fail:0 skip:50 time:421s fi-ivb-3520m total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:509s fi-ivb-3770 total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:478s fi-kbl-7500u total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:474s fi-kbl-7560u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:585s fi-kbl-r total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:588s fi-pnv-d510 total:279 pass:223 dwarn:1 dfail:0 fail:0 skip:55 time:523s fi-skl-6260u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:462s fi-skl-6700k total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:470s fi-skl-6770hq total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:486s fi-skl-gvtdvm total:279 pass:266 dwarn:0 dfail:0 fail:0 skip:13 time:441s fi-skl-x1585l total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:495s fi-snb-2520m total:279 pass:251 dwarn:0 dfail:0 fail:0 skip:28 time:543s fi-snb-2600 total:279 pass:250 dwarn:0 dfail:0 fail:0 skip:29 time:408s d063a48456d2aca379f00ac442211aff81e65fb1 drm-tip: 2017y-08m-12d-17h-57m-50s UTC integration manifest 7e9c800081a0 drm/i915/gvt: Fix guest i915 full ppgtt blocking issue 192c5d318a75 drm/i915: Enable guest i915 full ppgtt functionality 60b28280ffc1 drm/i915: Disconnect 32 and 48 bit ppGTT support == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5392/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v10 0/3] vGPU full 48bit ppgtt support 2017-08-14 7:41 [PATCH v10 0/3] vGPU full 48bit ppgtt support Zhenyu Wang ` (3 preceding siblings ...) 2017-08-14 7:58 ` ✓ Fi.CI.BAT: success for vGPU full 48bit ppgtt support Patchwork @ 2017-08-14 10:09 ` Zhang, Tina 2017-08-14 10:11 ` Zhenyu Wang 4 siblings, 1 reply; 9+ messages in thread From: Zhang, Tina @ 2017-08-14 10:09 UTC (permalink / raw) To: Zhenyu Wang, intel-gfx@lists.freedesktop.org Cc: intel-gvt-dev@lists.freedesktop.org > -----Original Message----- > From: intel-gvt-dev [mailto:intel-gvt-dev-bounces@lists.freedesktop.org] On > Behalf Of Zhenyu Wang > Sent: Monday, August 14, 2017 3:42 PM > To: intel-gfx@lists.freedesktop.org > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>; intel-gvt- > dev@lists.freedesktop.org > Subject: [PATCH v10 0/3] vGPU full 48bit ppgtt support > > Just refresh against Joonas's disconnect 32/48bit ppgtt support patch and give > full view on this series. If ok, I'll include them for gvt-next pull. Thanks Zhenyu. Looks like one patch is missing: https://lists.freedesktop.org/archives/intel-gvt-dev/2017-August/001641.html This patch can fix the rebooting issue with 48bit full ppgtt. Thanks. Tina > > Thanks > > Joonas Lahtinen (1): > drm/i915: Disconnect 32 and 48 bit ppGTT support > > Tina Zhang (2): > drm/i915: Enable guest i915 full ppgtt functionality > drm/i915/gvt: Fix guest i915 full ppgtt blocking issue > > drivers/gpu/drm/i915/gvt/gtt.c | 45 +++++++++++++++++++++++------------ > -- > drivers/gpu/drm/i915/gvt/vgpu.c | 1 + > drivers/gpu/drm/i915/i915_drv.h | 1 + > drivers/gpu/drm/i915/i915_gem_gtt.c | 17 +++++++++----- > drivers/gpu/drm/i915/i915_pvinfo.h | 8 ++++++- > drivers/gpu/drm/i915/i915_vgpu.c | 7 ++++++ > drivers/gpu/drm/i915/i915_vgpu.h | 3 +++ > 7 files changed, 58 insertions(+), 24 deletions(-) > > -- > 2.14.0 > > _______________________________________________ > intel-gvt-dev mailing list > intel-gvt-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v10 0/3] vGPU full 48bit ppgtt support 2017-08-14 10:09 ` [PATCH v10 0/3] " Zhang, Tina @ 2017-08-14 10:11 ` Zhenyu Wang 2017-08-14 10:19 ` Zhang, Tina 0 siblings, 1 reply; 9+ messages in thread From: Zhenyu Wang @ 2017-08-14 10:11 UTC (permalink / raw) To: Zhang, Tina Cc: intel-gfx@lists.freedesktop.org, intel-gvt-dev@lists.freedesktop.org [-- Attachment #1.1: Type: text/plain, Size: 647 bytes --] On 2017.08.14 10:09:38 +0000, Zhang, Tina wrote: > > Just refresh against Joonas's disconnect 32/48bit ppgtt support patch and give > > full view on this series. If ok, I'll include them for gvt-next pull. > Thanks Zhenyu. Looks like one patch is missing: > https://lists.freedesktop.org/archives/intel-gvt-dev/2017-August/001641.html > This patch can fix the rebooting issue with 48bit full ppgtt. I've applied that one already as its a fix for generic shadow issue, this just shows changes for vgpu full ppgtt, so skipped that. -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 195 bytes --] [-- Attachment #2: Type: text/plain, Size: 160 bytes --] _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v10 0/3] vGPU full 48bit ppgtt support 2017-08-14 10:11 ` Zhenyu Wang @ 2017-08-14 10:19 ` Zhang, Tina 0 siblings, 0 replies; 9+ messages in thread From: Zhang, Tina @ 2017-08-14 10:19 UTC (permalink / raw) To: Zhenyu Wang Cc: intel-gfx@lists.freedesktop.org, intel-gvt-dev@lists.freedesktop.org > -----Original Message----- > From: Zhenyu Wang [mailto:zhenyuw@linux.intel.com] > Sent: Monday, August 14, 2017 6:12 PM > To: Zhang, Tina <tina.zhang@intel.com> > Cc: intel-gfx@lists.freedesktop.org; Joonas Lahtinen > <joonas.lahtinen@linux.intel.com>; intel-gvt-dev@lists.freedesktop.org > Subject: Re: [PATCH v10 0/3] vGPU full 48bit ppgtt support > > On 2017.08.14 10:09:38 +0000, Zhang, Tina wrote: > > > Just refresh against Joonas's disconnect 32/48bit ppgtt support > > > patch and give full view on this series. If ok, I'll include them for gvt-next pull. > > Thanks Zhenyu. Looks like one patch is missing: > > https://lists.freedesktop.org/archives/intel-gvt-dev/2017-August/00164 > > 1.html This patch can fix the rebooting issue with 48bit full ppgtt. > > I've applied that one already as its a fix for generic shadow issue, this just shows > changes for vgpu full ppgtt, so skipped that. OK. Thanks BR, Tina > > -- > Open Source Technology Center, Intel ltd. > > $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2017-08-14 10:33 UTC | newest] Thread overview: 9+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-08-14 7:41 [PATCH v10 0/3] vGPU full 48bit ppgtt support Zhenyu Wang 2017-08-14 7:41 ` [PATCH v10 1/3] drm/i915: Disconnect 32 and 48 bit ppGTT support Zhenyu Wang 2017-08-14 10:33 ` Chris Wilson 2017-08-14 7:41 ` [PATCH v10 2/3] drm/i915: Enable guest i915 full ppgtt functionality Zhenyu Wang 2017-08-14 7:41 ` [PATCH v10 3/3] drm/i915/gvt: Fix guest i915 full ppgtt blocking issue Zhenyu Wang 2017-08-14 7:58 ` ✓ Fi.CI.BAT: success for vGPU full 48bit ppgtt support Patchwork 2017-08-14 10:09 ` [PATCH v10 0/3] " Zhang, Tina 2017-08-14 10:11 ` Zhenyu Wang 2017-08-14 10:19 ` Zhang, Tina
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