Re: [PATCH 11/22] drm/i915: support 1G pages for the 48b PPGTT

kbuild test robot
2017-08-20T08:25:26Z

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Hi Matthew,

[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20170817]
[cannot apply to v4.13-rc5]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url: https://github.com/0day-ci/linux/commits/Matthew-Auld/huge-gtt-pages/20170818-202207
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-b0-08201243 (attached as .config)
compiler: gcc-4.4 (Debian 4.4.7-8) 4.4.7
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64

All errors (new ones prefixed by >>):

cc1: warnings being treated as errors
drivers/gpu/drm/i915/i915_gem_gtt.c: In function 'gen8_ppgtt_insert_3lvl':
drivers/gpu/drm/i915/i915_gem_gtt.c:939: error: 'iter.sg' is used uninitialized in this function
drivers/gpu/drm/i915/i915_gem_gtt.c:940: error: 'iter.dma' is used uninitialized in this function
drivers/gpu/drm/i915/i915_gem_gtt.c: In function 'gen8_ppgtt_insert_4lvl':
>> drivers/gpu/drm/i915/i915_gem_gtt.c:1021: error: 'iter' is used uninitialized in this function

vim +/iter +1021 drivers/gpu/drm/i915/i915_gem_gtt.c

9df15b499 Ben Widawsky 2013-11-02 930
894ccebee Chris Wilson 2017-02-15 931 static void gen8_ppgtt_insert_3lvl(struct i915_address_space *vm,
4a234c5fa Matthew Auld 2017-06-22 932 struct i915_vma *vma,
f9b5b782c Michel Thierry 2015-07-30 933 enum i915_cache_level cache_level,
f9b5b782c Michel Thierry 2015-07-30 934 u32 unused)
f9b5b782c Michel Thierry 2015-07-30 935 {
17369ba08 Chuanxiao Dong 2017-07-07 936 struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
894ccebee Chris Wilson 2017-02-15 937 struct sgt_dma iter = {
4a234c5fa Matthew Auld 2017-06-22 938 .sg = vma->pages->sgl,
894ccebee Chris Wilson 2017-02-15 @939 .dma = sg_dma_address(iter.sg),
894ccebee Chris Wilson 2017-02-15 940 .max = iter.dma + iter.sg->length,
894ccebee Chris Wilson 2017-02-15 941 };
4a234c5fa Matthew Auld 2017-06-22 942 struct gen8_insert_pte idx = gen8_insert_pte(vma->node.start);
de5ba8eb9 Michel Thierry 2015-08-03 943
9e89f9ee3 Chris Wilson 2017-02-25 944 gen8_ppgtt_insert_pte_entries(ppgtt, &ppgtt->pdp, &iter, &idx,
9e89f9ee3 Chris Wilson 2017-02-25 945 cache_level);
de5ba8eb9 Michel Thierry 2015-08-03 946 }
894ccebee Chris Wilson 2017-02-15 947
352d8ddd2 Matthew Auld 2017-08-15 948 static void gen8_ppgtt_insert_huge_entries(struct i915_vma *vma,
352d8ddd2 Matthew Auld 2017-08-15 949 struct i915_page_directory_pointer **pdps,
352d8ddd2 Matthew Auld 2017-08-15 950 struct sgt_dma *iter,
352d8ddd2 Matthew Auld 2017-08-15 951 enum i915_cache_level cache_level)
352d8ddd2 Matthew Auld 2017-08-15 952 {
352d8ddd2 Matthew Auld 2017-08-15 953 const gen8_pte_t pte_encode = gen8_pte_encode(0, cache_level);
352d8ddd2 Matthew Auld 2017-08-15 954 u64 start = vma->node.start;
352d8ddd2 Matthew Auld 2017-08-15 955 dma_addr_t rem = iter->sg->length;
352d8ddd2 Matthew Auld 2017-08-15 956
352d8ddd2 Matthew Auld 2017-08-15 957 do {
352d8ddd2 Matthew Auld 2017-08-15 958 struct gen8_insert_pte idx = gen8_insert_pte(start);
352d8ddd2 Matthew Auld 2017-08-15 959 struct i915_page_directory_pointer *pdp = pdps[idx.pml4e];
352d8ddd2 Matthew Auld 2017-08-15 960 struct i915_page_directory *pd = pdp->page_directory[idx.pdpe];
352d8ddd2 Matthew Auld 2017-08-15 961 unsigned int page_size;
352d8ddd2 Matthew Auld 2017-08-15 962 gen8_pte_t encode = pte_encode;
352d8ddd2 Matthew Auld 2017-08-15 963 gen8_pte_t *vaddr;
352d8ddd2 Matthew Auld 2017-08-15 964 u16 index, max;
352d8ddd2 Matthew Auld 2017-08-15 965
352d8ddd2 Matthew Auld 2017-08-15 966 if (unlikely(vma->page_sizes.sg & I915_GTT_PAGE_SIZE_1G) &&
352d8ddd2 Matthew Auld 2017-08-15 967 IS_ALIGNED(iter->dma, I915_GTT_PAGE_SIZE_1G) &&
352d8ddd2 Matthew Auld 2017-08-15 968 rem >= I915_GTT_PAGE_SIZE_1G && !(idx.pte | idx.pde)) {
352d8ddd2 Matthew Auld 2017-08-15 969 index = idx.pdpe;
352d8ddd2 Matthew Auld 2017-08-15 970 max = GEN8_PML4ES_PER_PML4;
352d8ddd2 Matthew Auld 2017-08-15 971 page_size = I915_GTT_PAGE_SIZE_1G;
352d8ddd2 Matthew Auld 2017-08-15 972
352d8ddd2 Matthew Auld 2017-08-15 973 encode |= GEN8_PDPE_PS_1G;
352d8ddd2 Matthew Auld 2017-08-15 974
352d8ddd2 Matthew Auld 2017-08-15 975 vaddr = kmap_atomic_px(pdp);
352d8ddd2 Matthew Auld 2017-08-15 976 } else {
352d8ddd2 Matthew Auld 2017-08-15 977 struct i915_page_table *pt = pd->page_table[idx.pde];
352d8ddd2 Matthew Auld 2017-08-15 978
352d8ddd2 Matthew Auld 2017-08-15 979 index = idx.pte;
352d8ddd2 Matthew Auld 2017-08-15 980 max = GEN8_PTES;
352d8ddd2 Matthew Auld 2017-08-15 981 page_size = I915_GTT_PAGE_SIZE;
352d8ddd2 Matthew Auld 2017-08-15 982
352d8ddd2 Matthew Auld 2017-08-15 983 vaddr = kmap_atomic_px(pt);
352d8ddd2 Matthew Auld 2017-08-15 984 }
352d8ddd2 Matthew Auld 2017-08-15 985
352d8ddd2 Matthew Auld 2017-08-15 986 do {
352d8ddd2 Matthew Auld 2017-08-15 987 GEM_BUG_ON(iter->sg->length < page_size);
352d8ddd2 Matthew Auld 2017-08-15 988 vaddr[index++] = encode | iter->dma;
352d8ddd2 Matthew Auld 2017-08-15 989
352d8ddd2 Matthew Auld 2017-08-15 990 start += page_size;
352d8ddd2 Matthew Auld 2017-08-15 991 iter->dma += page_size;
352d8ddd2 Matthew Auld 2017-08-15 992 rem -= page_size;
352d8ddd2 Matthew Auld 2017-08-15 993 if (iter->dma >= iter->max) {
352d8ddd2 Matthew Auld 2017-08-15 994 iter->sg = __sg_next(iter->sg);
352d8ddd2 Matthew Auld 2017-08-15 995 if (!iter->sg)
352d8ddd2 Matthew Auld 2017-08-15 996 break;
352d8ddd2 Matthew Auld 2017-08-15 997
352d8ddd2 Matthew Auld 2017-08-15 998 rem = iter->sg->length;
352d8ddd2 Matthew Auld 2017-08-15 999 iter->dma = sg_dma_address(iter->sg);
352d8ddd2 Matthew Auld 2017-08-15 1000 iter->max = iter->dma + rem;
352d8ddd2 Matthew Auld 2017-08-15 1001
352d8ddd2 Matthew Auld 2017-08-15 1002 if (unlikely(!IS_ALIGNED(iter->dma, page_size)))
352d8ddd2 Matthew Auld 2017-08-15 1003 break;
352d8ddd2 Matthew Auld 2017-08-15 1004 }
352d8ddd2 Matthew Auld 2017-08-15 1005
352d8ddd2 Matthew Auld 2017-08-15 1006 } while (rem >= page_size && index < max);
352d8ddd2 Matthew Auld 2017-08-15 1007
352d8ddd2 Matthew Auld 2017-08-15 1008 kunmap_atomic(vaddr);
352d8ddd2 Matthew Auld 2017-08-15 1009
352d8ddd2 Matthew Auld 2017-08-15 1010 } while (iter->sg);
352d8ddd2 Matthew Auld 2017-08-15 1011 }
352d8ddd2 Matthew Auld 2017-08-15 1012
894ccebee Chris Wilson 2017-02-15 1013 static void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm,
4a234c5fa Matthew Auld 2017-06-22 1014 struct i915_vma *vma,
894ccebee Chris Wilson 2017-02-15 1015 enum i915_cache_level cache_level,
894ccebee Chris Wilson 2017-02-15 1016 u32 unused)
894ccebee Chris Wilson 2017-02-15 1017 {
894ccebee Chris Wilson 2017-02-15 1018 struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
894ccebee Chris Wilson 2017-02-15 1019 struct sgt_dma iter = {
4a234c5fa Matthew Auld 2017-06-22 1020 .sg = vma->pages->sgl,
894ccebee Chris Wilson 2017-02-15 @1021 .dma = sg_dma_address(iter.sg),
894ccebee Chris Wilson 2017-02-15 1022 .max = iter.dma + iter.sg->length,
894ccebee Chris Wilson 2017-02-15 1023 };
894ccebee Chris Wilson 2017-02-15 1024 struct i915_page_directory_pointer **pdps = ppgtt->pml4.pdps;
352d8ddd2 Matthew Auld 2017-08-15 1025
352d8ddd2 Matthew Auld 2017-08-15 1026 if (vma->page_sizes.sg > I915_GTT_PAGE_SIZE) {
352d8ddd2 Matthew Auld 2017-08-15 1027 gen8_ppgtt_insert_huge_entries(vma, pdps, &iter, cache_level);
352d8ddd2 Matthew Auld 2017-08-15 1028 } else {
4a234c5fa Matthew Auld 2017-06-22 1029 struct gen8_insert_pte idx = gen8_insert_pte(vma->node.start);
894ccebee Chris Wilson 2017-02-15 1030
352d8ddd2 Matthew Auld 2017-08-15 1031 while (gen8_ppgtt_insert_pte_entries(ppgtt, pdps[idx.pml4e++],
352d8ddd2 Matthew Auld 2017-08-15 1032 &iter, &idx, cache_level))
9e89f9ee3 Chris Wilson 2017-02-25 1033 GEM_BUG_ON(idx.pml4e >= GEN8_PML4ES_PER_PML4);
f9b5b782c Michel Thierry 2015-07-30 1034 }
352d8ddd2 Matthew Auld 2017-08-15 1035 }
f9b5b782c Michel Thierry 2015-07-30 1036

:::::: The code at line 1021 was first introduced by commit
:::::: 894ccebee2b0e606ba9638d20dd87b33568482d7 drm/i915: Micro-optimise gen8_ppgtt_insert_entries()

:::::: TO: Chris Wilson <chris@chris-wilson.co.uk>
:::::: CC: Chris Wilson <chris@chris-wilson.co.uk>

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