[PATCH i-g-t v3] pm_rps: Changes in waitboost scenario

[Katarzyna Dec <katarzyna.dec@intel.com>]

CI is observing sporadical failures in pm_rps subtests.
There are a couple of reasons. One of them is the fact that
on gen6, gen7 and gen7.5, max frequency (as in the HW limit)
is not set to RP0, but the value obtaind from PCODE (which
may be different from RP0). Thus the test is operating under
wrong assumptions (SOFTMAX == RP0 == BOOST which is simply
not the case). Let's compare current frequency with BOOST
frequency rather than SOFTMAX to get the test behaviour under control.
In boost_freq function I set MAX freq to midium freqency, which ensures
that we for sure reach BOOST frequency. This could help with failures
with boost frequency failing to drop down.

v2: Commit message, simplified waiting for boost to finish, drop
noisy whitespace cleanup.

v3: Removed reading from i915_rps_boost_info debugfs because it not
the same on every kernel. Removed function waiting for boost.
Instead of that I made sure we will reach in boost by setting MAX freq to fmid.

v4: Moved proposal with making test drm master to other patch

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jeff Mcgee <jeff.mcgee@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Signed-off-by: Katarzyna Dec <katarzyna.dec@intel.com>
---
 tests/pm_rps.c | 26 ++++++++++++++++++++------
 1 file changed, 20 insertions(+), 6 deletions(-)

diff --git a/tests/pm_rps.c b/tests/pm_rps.c
index f0455e78..e8a051cf 100644
--- a/tests/pm_rps.c
+++ b/tests/pm_rps.c
@@ -50,6 +50,7 @@ enum {
 	RP0,
 	RP1,
 	RPn,
+	BOOST,
 	NUMFREQ
 };
 
@@ -60,7 +61,7 @@ struct junk {
 	const char *mode;
 	FILE *filp;
 } stuff[] = {
-	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { NULL, NULL, NULL }
+	{ "cur", "r", NULL }, { "min", "rb+", NULL }, { "max", "rb+", NULL }, { "RP0", "r", NULL }, { "RP1", "r", NULL }, { "RPn", "r", NULL }, { "boost", "rb+", NULL }, { NULL, NULL, NULL }
 };
 
 static int readval(FILE *filp)
@@ -563,18 +564,32 @@ static void reset_gpu(void)
 static void boost_freq(int fd, int *boost_freqs)
 {
 	int64_t timeout = 1;
-	int ring = -1;
 	igt_spin_t *load;
+	unsigned int engine;
+	int fmid = (origfreqs[RPn] + origfreqs[RP0]) / 2;
 
-	load = igt_spin_batch_new(fd, ring, 0);
+	fmid = get_hw_rounded_freq(fmid);
+	//set max freq to less then boost freq
+	writeval(stuff[MAX].filp, fmid);
 
+	/* put boost on the same engine as low load */
+	engine = I915_EXEC_RENDER;
+	if (intel_gen(lh.devid) >= 6)
+		engine = I915_EXEC_BLT;
+	load = igt_spin_batch_new(fd, engine, 0);
 	/* Waiting will grant us a boost to maximum */
 	gem_wait(fd, load->handle, &timeout);
 
 	read_freqs(boost_freqs);
 	dump(boost_freqs);
 
+	/* Avoid downlocking till boost request is pending */
+	igt_spin_batch_end(load);
+	gem_sync(fd, load->handle);
 	igt_spin_batch_free(fd, load);
+
+	//set max freq to original softmax
+	writeval(stuff[MAX].filp, origfreqs[MAX]);
 }
 
 static void waitboost(bool reset)
@@ -582,7 +597,6 @@ static void waitboost(bool reset)
 	int pre_freqs[NUMFREQ];
 	int boost_freqs[NUMFREQ];
 	int post_freqs[NUMFREQ];
-
 	int fd = drm_open_driver(DRIVER_INTEL);
 
 	load_helper_run(LOW);
@@ -611,7 +625,7 @@ static void waitboost(bool reset)
 	idle_check();
 
 	igt_assert_lt(pre_freqs[CUR], pre_freqs[MAX]);
-	igt_assert_eq(boost_freqs[CUR], boost_freqs[MAX]);
+	igt_assert_eq(boost_freqs[CUR], boost_freqs[BOOST]);
 	igt_assert_lt(post_freqs[CUR], post_freqs[MAX]);
 
 	close(fd);
@@ -657,7 +671,7 @@ igt_main
 			val = readval(junk->filp);
 			igt_assert(val >= 0);
 			junk++;
-		} while(junk->name != NULL);
+		} while (junk->name != NULL);
 
 		read_freqs(origfreqs);
 
-- 
2.13.4

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