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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/8] drm/i915: Introduce intel_ddi_dp_level.
Date: Wed, 30 Aug 2017 17:15:42 +0300	[thread overview]
Message-ID: <20170830141542.GD4914@intel.com> (raw)
In-Reply-To: <20170829232230.23051-1-rodrigo.vivi@intel.com>

On Tue, Aug 29, 2017 at 04:22:23PM -0700, Rodrigo Vivi wrote:
> No functional changes. This only moves the DP level
> selection to a separated function that will be later
> used to organize better the vswing sequences.
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 16 ++++++++++------
>  1 file changed, 10 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 0a316a6ccb50..7e875e05d053 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2054,18 +2054,22 @@ static uint32_t translate_signal_level(int signal_levels)
>  	return 0;
>  }
>  
> +static uint32_t intel_ddi_dp_level(struct intel_dp *intel_dp)
> +{
> +	uint8_t train_set = intel_dp->train_set[0];
> +	int signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |
> +					 DP_TRAIN_PRE_EMPHASIS_MASK);
> +
> +	return translate_signal_level(signal_levels);
> +}
> +
>  uint32_t ddi_signal_levels(struct intel_dp *intel_dp)
>  {
>  	struct intel_digital_port *dport = dp_to_dig_port(intel_dp);
>  	struct drm_i915_private *dev_priv = to_i915(dport->base.base.dev);
>  	struct intel_encoder *encoder = &dport->base;
> -	uint8_t train_set = intel_dp->train_set[0];
> -	int signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |
> -					 DP_TRAIN_PRE_EMPHASIS_MASK);
>  	enum port port = dport->port;
> -	uint32_t level;
> -
> -	level = translate_signal_level(signal_levels);
> +	uint32_t level = intel_ddi_dp_level(intel_dp);
>  
>  	if (IS_GEN9_BC(dev_priv))
>  		skl_ddi_set_iboost(encoder, level);
> -- 
> 2.13.2

-- 
Ville Syrjälä
Intel OTC
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  parent reply	other threads:[~2017-08-30 14:15 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-29 23:22 [PATCH 1/8] drm/i915: Introduce intel_ddi_dp_level Rodrigo Vivi
2017-08-29 23:22 ` [PATCH 2/8] drm/i915: decouple gen9 and gen10 dp signal levels Rodrigo Vivi
2017-08-30 14:06   ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 3/8] drm/i915: Align vswing sequences with old ddi buffer registers Rodrigo Vivi
2017-08-30 14:16   ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 4/8] drm/i915: Enable voltage swing before enabling DDI_BUF_CTL Rodrigo Vivi
2017-08-30 14:17   ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 5/8] drm/i915/cnl: Move voltage check into ddi buf trans functions Rodrigo Vivi
2017-08-30 14:11   ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 6/8] drm/i915/cnl: Move ddi buf trans related functions up Rodrigo Vivi
2017-08-30 14:17   ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 7/8] drm/i915/cnl: Fix DDI hdmi level selection Rodrigo Vivi
2017-08-30 14:13   ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 8/8] drm/i915/cnl: Fix DP max voltage Rodrigo Vivi
2017-08-30 14:14   ` Ville Syrjälä
2017-08-30 14:20   ` Ville Syrjälä
2017-08-30  0:35 ` ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915: Introduce intel_ddi_dp_level Patchwork
2017-08-30  5:26 ` ✓ Fi.CI.IGT: " Patchwork
2017-08-30 14:15 ` Ville Syrjälä [this message]
     [not found] <Message-id: <20170830142037.GH4914@intel.com>
2017-08-31  0:00 ` [PATCH] drm/i915/cnl: Fix DP max voltage Rodrigo Vivi
2017-08-31 12:34   ` Ville Syrjälä
     [not found] <Message-id: <20170831123436.GO4914@intel.com>
2017-08-31 14:53 ` Rodrigo Vivi
2017-08-31 15:06   ` Ville Syrjälä
2017-08-31 16:49     ` Vivi, Rodrigo

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