[PATCH] drm/i915/cnl: Fix DP max voltage

Rodrigo Vivi
2017-08-31T00:00:52Z

From: "Vivi, Rodrigo" <rodrigo.vivi@intel.com>

On clock recovery this function is called to find out
the max voltage swing level that we could go.

However gen 9 functions use the old buffer translation tables
to figure that out. That table is not valid for CNL
causing an invalid number of entries and an invalid selection
on the max voltage swing level.

v2: Let's use same approach that previous platforms.
v3: Actually use n_entries and avoid duplicated -1.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/intel_ddi.c | 48 +++++++++++++++++++++++++++++++---------
1 file changed, 38 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index d962552e2ccc..9aa508616284 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -649,6 +649,29 @@ cnl_get_buf_trans_edp(struct drm_i915_private *dev_priv, int *n_entries)
}
}

+static int cnl_max_level(struct drm_i915_private *dev_priv,
+ enum intel_output_type type)
+{
+ int n_entries = 0;
+
+ switch (type) {
+ case INTEL_OUTPUT_DP:
+ cnl_get_buf_trans_dp(dev_priv, &n_entries);
+ break;
+ case INTEL_OUTPUT_EDP:
+ cnl_get_buf_trans_edp(dev_priv, &n_entries);
+ break;
+ case INTEL_OUTPUT_HDMI:
+ cnl_get_buf_trans_hdmi(dev_priv, &n_entries);
+ break;
+ default:
+ MISSING_CASE(type);
+ return 0;
+ }
+
+ return n_entries;
+}
+
static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port port)
{
int n_hdmi_entries;
@@ -1877,19 +1900,24 @@ static void bxt_ddi_vswing_sequence(struct drm_i915_private *dev_priv,
u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
- int n_entries;
+ int n_entries, level;

- if (encoder->type == INTEL_OUTPUT_EDP)
- intel_ddi_get_buf_trans_edp(dev_priv, &n_entries);
- else
- intel_ddi_get_buf_trans_dp(dev_priv, &n_entries);
+ if (IS_CANNONLAKE(dev_priv)) {
+ level = cnl_max_level(dev_priv, encoder->type);
+ } else {
+ if (encoder->type == INTEL_OUTPUT_EDP)
+ intel_ddi_get_buf_trans_edp(dev_priv, &n_entries);
+ else
+ intel_ddi_get_buf_trans_dp(dev_priv, &n_entries);
+ level = n_entries - 1;
+ }

- if (WARN_ON(n_entries < 1))
- n_entries = 1;
- if (WARN_ON(n_entries > ARRAY_SIZE(index_to_dp_signal_levels)))
- n_entries = ARRAY_SIZE(index_to_dp_signal_levels);
+ if (WARN_ON(level < 0))
+ level = 0;
+ if (WARN_ON(level > ARRAY_SIZE(index_to_dp_signal_levels) - 1))
+ level = ARRAY_SIZE(index_to_dp_signal_levels) - 1;

- return index_to_dp_signal_levels[n_entries - 1] &
+ return index_to_dp_signal_levels[level] &
DP_TRAIN_VOLTAGE_SWING_MASK;
}

--
2.13.2