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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/cnl: Fix DP max voltage
Date: Thu, 31 Aug 2017 15:34:36 +0300	[thread overview]
Message-ID: <20170831123436.GO4914@intel.com> (raw)
In-Reply-To: <20170831000050.21729-1-rodrigo.vivi@intel.com>

On Wed, Aug 30, 2017 at 05:00:50PM -0700, Rodrigo Vivi wrote:
> From: "Vivi, Rodrigo" <rodrigo.vivi@intel.com>
> 
> On clock recovery this function is called to find out
> the max voltage swing level that we could go.
> 
> However gen 9 functions use the old buffer translation tables
> to figure that out. That table is not valid for CNL
> causing an invalid number of entries and an invalid selection
> on the max voltage swing level.
> 
> v2: Let's use same approach that previous platforms.
> v3: Actually use n_entries and avoid duplicated -1.
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Clint Taylor <clinton.a.taylor@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 48 +++++++++++++++++++++++++++++++---------
>  1 file changed, 38 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index d962552e2ccc..9aa508616284 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -649,6 +649,29 @@ cnl_get_buf_trans_edp(struct drm_i915_private *dev_priv, int *n_entries)
>  	}
>  }
>  
> +static int cnl_max_level(struct drm_i915_private *dev_priv,
> +			 enum intel_output_type type)
> +{
> +	int n_entries = 0;
> +
> +	switch (type) {
> +	case INTEL_OUTPUT_DP:
> +		cnl_get_buf_trans_dp(dev_priv, &n_entries);
> +		break;
> +	case INTEL_OUTPUT_EDP:
> +		cnl_get_buf_trans_edp(dev_priv, &n_entries);
> +		break;
> +	case INTEL_OUTPUT_HDMI:
> +		cnl_get_buf_trans_hdmi(dev_priv, &n_entries);
> +		break;
> +	default:
> +		MISSING_CASE(type);
> +		return 0;
> +	}
> +
> +	return n_entries;
> +}
> +
>  static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port port)
>  {
>  	int n_hdmi_entries;
> @@ -1877,19 +1900,24 @@ static void bxt_ddi_vswing_sequence(struct drm_i915_private *dev_priv,
>  u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -	int n_entries;
> +	int n_entries, level;
>  
> -	if (encoder->type == INTEL_OUTPUT_EDP)
> -		intel_ddi_get_buf_trans_edp(dev_priv, &n_entries);
> -	else
> -		intel_ddi_get_buf_trans_dp(dev_priv, &n_entries);
> +	if (IS_CANNONLAKE(dev_priv)) {
> +		level = cnl_max_level(dev_priv, encoder->type);
> +	} else {
> +		if (encoder->type == INTEL_OUTPUT_EDP)
> +			intel_ddi_get_buf_trans_edp(dev_priv, &n_entries);
> +		else
> +			intel_ddi_get_buf_trans_dp(dev_priv, &n_entries);
> +		level = n_entries - 1;

You removed the -1 from the cnl path but then added it to the other path?

In fact, I think to keep things looking a bit more consistent I'd just
open code the cnl stuff in intel_ddi_dp_voltage_max() the same way as
the other platforms are handled. And we don't even need to care about HDMI
here.

> +	}
>  
> -	if (WARN_ON(n_entries < 1))
> -		n_entries = 1;
> -	if (WARN_ON(n_entries > ARRAY_SIZE(index_to_dp_signal_levels)))
> -		n_entries = ARRAY_SIZE(index_to_dp_signal_levels);
> +	if (WARN_ON(level < 0))
> +		level = 0;
> +	if (WARN_ON(level > ARRAY_SIZE(index_to_dp_signal_levels) - 1))
> +		level = ARRAY_SIZE(index_to_dp_signal_levels) - 1;
>  
> -	return index_to_dp_signal_levels[n_entries - 1] &
> +	return index_to_dp_signal_levels[level] &
>  		DP_TRAIN_VOLTAGE_SWING_MASK;
>  }
>  
> -- 
> 2.13.2

-- 
Ville Syrjälä
Intel OTC
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Intel-gfx@lists.freedesktop.org
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  reply	other threads:[~2017-08-31 12:34 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <Message-id: <20170830142037.GH4914@intel.com>
2017-08-31  0:00 ` [PATCH] drm/i915/cnl: Fix DP max voltage Rodrigo Vivi
2017-08-31 12:34   ` Ville Syrjälä [this message]
     [not found] <Message-id: <20170831123436.GO4914@intel.com>
2017-08-31 14:53 ` Rodrigo Vivi
2017-08-31 15:06   ` Ville Syrjälä
2017-08-31 16:49     ` Vivi, Rodrigo
2017-08-29 23:22 [PATCH 1/8] drm/i915: Introduce intel_ddi_dp_level Rodrigo Vivi
2017-08-29 23:22 ` [PATCH 2/8] drm/i915: decouple gen9 and gen10 dp signal levels Rodrigo Vivi
2017-08-30 14:06   ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 3/8] drm/i915: Align vswing sequences with old ddi buffer registers Rodrigo Vivi
2017-08-30 14:16   ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 4/8] drm/i915: Enable voltage swing before enabling DDI_BUF_CTL Rodrigo Vivi
2017-08-30 14:17   ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 5/8] drm/i915/cnl: Move voltage check into ddi buf trans functions Rodrigo Vivi
2017-08-30 14:11   ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 6/8] drm/i915/cnl: Move ddi buf trans related functions up Rodrigo Vivi
2017-08-30 14:17   ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 7/8] drm/i915/cnl: Fix DDI hdmi level selection Rodrigo Vivi
2017-08-30 14:13   ` Ville Syrjälä
2017-08-29 23:22 ` [PATCH 8/8] drm/i915/cnl: Fix DP max voltage Rodrigo Vivi
2017-08-30 14:14   ` Ville Syrjälä
2017-08-30 14:20   ` Ville Syrjälä
2017-08-30  0:35 ` ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915: Introduce intel_ddi_dp_level Patchwork
2017-08-30  5:26 ` ✓ Fi.CI.IGT: " Patchwork
2017-08-30 14:15 ` [PATCH 1/8] " Ville Syrjälä
  -- strict thread matches above, loose matches on Subject: below --
2017-07-10 18:18 [PATCH] drm/i915/cnl: Fix DP max voltage Rodrigo Vivi
2017-07-10 18:40 ` Ville Syrjälä
2017-07-10 19:25   ` Vivi, Rodrigo

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