From: Patchwork <patchwork@emeril.freedesktop.org>
To: changbin.du@intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.IGT: warning for drm/i915: Add interface to reserve fence registers for vGPU (rev2)
Date: Fri, 01 Sep 2017 08:42:43 -0000 [thread overview]
Message-ID: <20170901084243.7606.39673@emeril.freedesktop.org> (raw)
In-Reply-To: <1504083261-13136-1-git-send-email-changbin.du@intel.com>
== Series Details ==
Series: drm/i915: Add interface to reserve fence registers for vGPU (rev2)
URL : https://patchwork.freedesktop.org/series/29523/
State : warning
== Summary ==
Test kms_vblank:
Subgroup wait-busy:
pass -> SKIP (shard-hsw)
shard-hsw total:2265 pass:1231 dwarn:0 dfail:0 fail:17 skip:1017 time:9611s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5557/shards.html
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prev parent reply other threads:[~2017-09-01 8:42 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-30 8:54 [PATCH] drm/i915: Add interface to reserve fence registers for vGPU changbin.du
2017-08-30 9:19 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-08-30 9:27 ` [PATCH] " Chris Wilson
2017-08-31 3:21 ` Du, Changbin
2017-08-30 10:34 ` ✗ Fi.CI.IGT: failure for " Patchwork
2017-09-01 7:08 ` [PATCH v2] " changbin.du
2017-09-01 10:59 ` Chris Wilson
2017-09-04 6:08 ` Du, Changbin
2017-09-01 7:38 ` ✓ Fi.CI.BAT: success for drm/i915: Add interface to reserve fence registers for vGPU (rev2) Patchwork
2017-09-01 8:42 ` Patchwork [this message]
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