* [PATCH] drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register @ 2017-09-05 18:45 Nanley Chery 2017-09-05 19:04 ` ✗ Fi.CI.BAT: failure for " Patchwork 2017-09-05 19:04 ` [PATCH] " Vivi, Rodrigo 0 siblings, 2 replies; 7+ messages in thread From: Nanley Chery @ 2017-09-05 18:45 UTC (permalink / raw) To: intel-gfx; +Cc: Rodrigo Vivi, Nanley Chery, Ben Widawsky From: Ben Widawsky <benjamin.widawsky@intel.com> This enables the Mesa driver to advertise support for ARB_timer_query, and thus an OpenGL version higher than 3.2. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> --- drivers/gpu/drm/i915/intel_uncore.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 1d7b879cc68c..0529af7cfbb8 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -1251,7 +1251,7 @@ static const struct register_whitelist { } whitelist[] = { { .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE), .offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE), - .size = 8, .gen_bitmask = GEN_RANGE(4, 9) }, + .size = 8, .gen_bitmask = GEN_RANGE(4, 10) }, }; int i915_reg_read_ioctl(struct drm_device *dev, -- 2.14.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 7+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register 2017-09-05 18:45 [PATCH] drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register Nanley Chery @ 2017-09-05 19:04 ` Patchwork 2017-09-05 19:04 ` [PATCH] " Vivi, Rodrigo 1 sibling, 0 replies; 7+ messages in thread From: Patchwork @ 2017-09-05 19:04 UTC (permalink / raw) To: Nanley Chery; +Cc: intel-gfx == Series Details == Series: drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register URL : https://patchwork.freedesktop.org/series/29839/ State : failure == Summary == Series 29839v1 drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register https://patchwork.freedesktop.org/api/1.0/series/29839/revisions/1/mbox/ Test kms_cursor_legacy: Subgroup basic-busy-flip-before-cursor-atomic: pass -> FAIL (fi-snb-2600) fdo#100215 +1 Subgroup basic-flip-after-cursor-atomic: pass -> INCOMPLETE (fi-bxt-j4205) Test kms_flip: Subgroup basic-flip-vs-modeset: skip -> PASS (fi-cfl-s) Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: pass -> DMESG-WARN (fi-byt-n2820) fdo#101705 Test pm_rpm: Subgroup basic-pci-d3-state: pass -> SKIP (fi-cfl-s) Test drv_module_reload: Subgroup basic-reload-inject: dmesg-fail -> DMESG-WARN (fi-cfl-s) k.org#196765 fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215 fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705 k.org#196765 https://bugzilla.kernel.org/show_bug.cgi?id=196765 fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:454s fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:443s fi-blb-e6850 total:289 pass:224 dwarn:1 dfail:0 fail:0 skip:64 time:366s fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:559s fi-bwr-2160 total:289 pass:184 dwarn:0 dfail:0 fail:0 skip:105 time:255s fi-bxt-j4205 total:211 pass:189 dwarn:0 dfail:0 fail:0 skip:21 fi-byt-j1900 total:289 pass:254 dwarn:1 dfail:0 fail:0 skip:34 time:524s fi-byt-n2820 total:289 pass:250 dwarn:1 dfail:0 fail:0 skip:38 time:514s fi-cfl-s total:289 pass:249 dwarn:4 dfail:0 fail:0 skip:36 time:464s fi-elk-e7500 total:289 pass:230 dwarn:0 dfail:0 fail:0 skip:59 time:442s fi-glk-2a total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:615s fi-hsw-4770 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:444s fi-hsw-4770r total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:424s fi-ilk-650 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:426s fi-ivb-3520m total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:511s fi-ivb-3770 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:473s fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:513s fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:595s fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:594s fi-pnv-d510 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:526s fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:473s fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:532s fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:515s fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:445s fi-skl-x1585l total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:501s fi-snb-2520m total:289 pass:251 dwarn:0 dfail:0 fail:0 skip:38 time:556s fi-snb-2600 total:289 pass:248 dwarn:0 dfail:0 fail:2 skip:39 time:404s 3b8f5b73f918f7aba4569b155bbd87e258f21c81 drm-tip: 2017y-09m-05d-18h-24m-26s UTC integration manifest d5054947399a drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5585/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register 2017-09-05 18:45 [PATCH] drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register Nanley Chery 2017-09-05 19:04 ` ✗ Fi.CI.BAT: failure for " Patchwork @ 2017-09-05 19:04 ` Vivi, Rodrigo 2017-09-06 18:26 ` Nanley Chery 1 sibling, 1 reply; 7+ messages in thread From: Vivi, Rodrigo @ 2017-09-05 19:04 UTC (permalink / raw) To: nanleychery@gmail.com Cc: intel-gfx@lists.freedesktop.org, Chery, Nanley G, Widawsky, Benjamin On Tue, 2017-09-05 at 11:45 -0700, Nanley Chery wrote: > From: Ben Widawsky <benjamin.widawsky@intel.com> Do we have a signed-off by him? Maybe go with you as author and suggested-by Ben? > > This enables the Mesa driver to advertise support for ARB_timer_query, and > thus an OpenGL version higher than 3.2. > I tried to check if this patch should be a "Fixes:" for a previous one, but I didn't find anyone that this patch would fit. Just a forgotten case. > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> > --- > drivers/gpu/drm/i915/intel_uncore.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > index 1d7b879cc68c..0529af7cfbb8 100644 > --- a/drivers/gpu/drm/i915/intel_uncore.c > +++ b/drivers/gpu/drm/i915/intel_uncore.c > @@ -1251,7 +1251,7 @@ static const struct register_whitelist { > } whitelist[] = { > { .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE), > .offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE), > - .size = 8, .gen_bitmask = GEN_RANGE(4, 9) }, > + .size = 8, .gen_bitmask = GEN_RANGE(4, 10) }, Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> I'd like to kill this GEN_RANGE since it is easy to forget when enabling a new platform. But this is topic for a different patch. > }; > > int i915_reg_read_ioctl(struct drm_device *dev, _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register 2017-09-05 19:04 ` [PATCH] " Vivi, Rodrigo @ 2017-09-06 18:26 ` Nanley Chery 2017-09-06 19:16 ` Rodrigo Vivi 0 siblings, 1 reply; 7+ messages in thread From: Nanley Chery @ 2017-09-06 18:26 UTC (permalink / raw) To: Vivi, Rodrigo Cc: intel-gfx@lists.freedesktop.org, Chery, Nanley G, Widawsky, Benjamin On Tue, Sep 05, 2017 at 07:04:44PM +0000, Vivi, Rodrigo wrote: > On Tue, 2017-09-05 at 11:45 -0700, Nanley Chery wrote: > > From: Ben Widawsky <benjamin.widawsky@intel.com> > > Do we have a signed-off by him? > Maybe go with you as author and suggested-by Ben? > He's good with the second option. Should I send a v2? > > > > This enables the Mesa driver to advertise support for ARB_timer_query, and > > thus an OpenGL version higher than 3.2. > > > > I tried to check if this patch should be a "Fixes:" for a previous one, > but I didn't find anyone that this patch would fit. Just a forgotten > case. > > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > > Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> > > --- > > drivers/gpu/drm/i915/intel_uncore.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > > index 1d7b879cc68c..0529af7cfbb8 100644 > > --- a/drivers/gpu/drm/i915/intel_uncore.c > > +++ b/drivers/gpu/drm/i915/intel_uncore.c > > @@ -1251,7 +1251,7 @@ static const struct register_whitelist { > > } whitelist[] = { > > { .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE), > > .offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE), > > - .size = 8, .gen_bitmask = GEN_RANGE(4, 9) }, > > + .size = 8, .gen_bitmask = GEN_RANGE(4, 10) }, > > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > Thanks! > I'd like to kill this GEN_RANGE since it is easy to forget when enabling > a new platform. But this is topic for a different patch. > > Agreed. > > }; > > > > int i915_reg_read_ioctl(struct drm_device *dev, > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register 2017-09-06 18:26 ` Nanley Chery @ 2017-09-06 19:16 ` Rodrigo Vivi 2017-09-06 19:32 ` Rodrigo Vivi 0 siblings, 1 reply; 7+ messages in thread From: Rodrigo Vivi @ 2017-09-06 19:16 UTC (permalink / raw) To: Nanley Chery Cc: intel-gfx@lists.freedesktop.org, Widawsky, Benjamin, Chery, Nanley G, Vivi, Rodrigo On Wed, Sep 6, 2017 at 11:26 AM, Nanley Chery <nanleychery@gmail.com> wrote: > On Tue, Sep 05, 2017 at 07:04:44PM +0000, Vivi, Rodrigo wrote: >> On Tue, 2017-09-05 at 11:45 -0700, Nanley Chery wrote: >> > From: Ben Widawsky <benjamin.widawsky@intel.com> >> >> Do we have a signed-off by him? >> Maybe go with you as author and suggested-by Ben? >> > > He's good with the second option. Should I send a v2? usually I'd say yes, but since I had patch here applied already I just changed it myself ;) But since CI had a hiccup on the initial attempt I'm sending to try bot before merging it. Since we don't have any gen10 on CI and this change is really only changing behaviour of gen10 that failure was probably bogus, but I want to just double check here... > >> > >> > This enables the Mesa driver to advertise support for ARB_timer_query, and >> > thus an OpenGL version higher than 3.2. >> > >> >> I tried to check if this patch should be a "Fixes:" for a previous one, >> but I didn't find anyone that this patch would fit. Just a forgotten >> case. >> >> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> >> > Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> >> > --- >> > drivers/gpu/drm/i915/intel_uncore.c | 2 +- >> > 1 file changed, 1 insertion(+), 1 deletion(-) >> > >> > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c >> > index 1d7b879cc68c..0529af7cfbb8 100644 >> > --- a/drivers/gpu/drm/i915/intel_uncore.c >> > +++ b/drivers/gpu/drm/i915/intel_uncore.c >> > @@ -1251,7 +1251,7 @@ static const struct register_whitelist { >> > } whitelist[] = { >> > { .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE), >> > .offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE), >> > - .size = 8, .gen_bitmask = GEN_RANGE(4, 9) }, >> > + .size = 8, .gen_bitmask = GEN_RANGE(4, 10) }, >> >> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> >> > > Thanks! > >> I'd like to kill this GEN_RANGE since it is easy to forget when enabling >> a new platform. But this is topic for a different patch. >> >> > > Agreed. > >> > }; >> > >> > int i915_reg_read_ioctl(struct drm_device *dev, >> > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Rodrigo Vivi Blog: http://blog.vivi.eng.br _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register 2017-09-06 19:16 ` Rodrigo Vivi @ 2017-09-06 19:32 ` Rodrigo Vivi 2017-09-06 20:13 ` Nanley Chery 0 siblings, 1 reply; 7+ messages in thread From: Rodrigo Vivi @ 2017-09-06 19:32 UTC (permalink / raw) To: Nanley Chery Cc: intel-gfx@lists.freedesktop.org, Widawsky, Benjamin, Chery, Nanley G, Vivi, Rodrigo On Wed, Sep 6, 2017 at 12:16 PM, Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote: > On Wed, Sep 6, 2017 at 11:26 AM, Nanley Chery <nanleychery@gmail.com> wrote: >> On Tue, Sep 05, 2017 at 07:04:44PM +0000, Vivi, Rodrigo wrote: >>> On Tue, 2017-09-05 at 11:45 -0700, Nanley Chery wrote: >>> > From: Ben Widawsky <benjamin.widawsky@intel.com> >>> >>> Do we have a signed-off by him? >>> Maybe go with you as author and suggested-by Ben? >>> >> >> He's good with the second option. Should I send a v2? > > usually I'd say yes, but since I had patch here applied already I just > changed it myself ;) > But since CI had a hiccup on the initial attempt I'm sending to try > bot before merging it. > > Since we don't have any gen10 on CI and this change is really only > changing behaviour > of gen10 that failure was probably bogus, but I want to just double > check here... > trybot is happy! merged to dinq. thanks for the patch. >> >>> > >>> > This enables the Mesa driver to advertise support for ARB_timer_query, and >>> > thus an OpenGL version higher than 3.2. >>> > >>> >>> I tried to check if this patch should be a "Fixes:" for a previous one, >>> but I didn't find anyone that this patch would fit. Just a forgotten >>> case. >>> >>> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> >>> > Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> >>> > --- >>> > drivers/gpu/drm/i915/intel_uncore.c | 2 +- >>> > 1 file changed, 1 insertion(+), 1 deletion(-) >>> > >>> > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c >>> > index 1d7b879cc68c..0529af7cfbb8 100644 >>> > --- a/drivers/gpu/drm/i915/intel_uncore.c >>> > +++ b/drivers/gpu/drm/i915/intel_uncore.c >>> > @@ -1251,7 +1251,7 @@ static const struct register_whitelist { >>> > } whitelist[] = { >>> > { .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE), >>> > .offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE), >>> > - .size = 8, .gen_bitmask = GEN_RANGE(4, 9) }, >>> > + .size = 8, .gen_bitmask = GEN_RANGE(4, 10) }, >>> >>> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> >>> >> >> Thanks! >> >>> I'd like to kill this GEN_RANGE since it is easy to forget when enabling >>> a new platform. But this is topic for a different patch. >>> >>> >> >> Agreed. >> >>> > }; >>> > >>> > int i915_reg_read_ioctl(struct drm_device *dev, >>> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > -- > Rodrigo Vivi > Blog: http://blog.vivi.eng.br -- Rodrigo Vivi Blog: http://blog.vivi.eng.br _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register 2017-09-06 19:32 ` Rodrigo Vivi @ 2017-09-06 20:13 ` Nanley Chery 0 siblings, 0 replies; 7+ messages in thread From: Nanley Chery @ 2017-09-06 20:13 UTC (permalink / raw) To: Rodrigo Vivi Cc: intel-gfx@lists.freedesktop.org, Widawsky, Benjamin, Chery, Nanley G, Vivi, Rodrigo On Wed, Sep 06, 2017 at 12:32:15PM -0700, Rodrigo Vivi wrote: > On Wed, Sep 6, 2017 at 12:16 PM, Rodrigo Vivi <rodrigo.vivi@gmail.com> wrote: > > On Wed, Sep 6, 2017 at 11:26 AM, Nanley Chery <nanleychery@gmail.com> wrote: > >> On Tue, Sep 05, 2017 at 07:04:44PM +0000, Vivi, Rodrigo wrote: > >>> On Tue, 2017-09-05 at 11:45 -0700, Nanley Chery wrote: > >>> > From: Ben Widawsky <benjamin.widawsky@intel.com> > >>> > >>> Do we have a signed-off by him? > >>> Maybe go with you as author and suggested-by Ben? > >>> > >> > >> He's good with the second option. Should I send a v2? > > > > usually I'd say yes, but since I had patch here applied already I just > > changed it myself ;) > > But since CI had a hiccup on the initial attempt I'm sending to try > > bot before merging it. > > > > Since we don't have any gen10 on CI and this change is really only > > changing behaviour > > of gen10 that failure was probably bogus, but I want to just double > > check here... > > > > trybot is happy! merged to dinq. thanks for the patch. > Great. Thanks again! > >> > >>> > > >>> > This enables the Mesa driver to advertise support for ARB_timer_query, and > >>> > thus an OpenGL version higher than 3.2. > >>> > > >>> > >>> I tried to check if this patch should be a "Fixes:" for a previous one, > >>> but I didn't find anyone that this patch would fit. Just a forgotten > >>> case. > >>> > >>> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > >>> > Signed-off-by: Nanley Chery <nanley.g.chery@intel.com> > >>> > --- > >>> > drivers/gpu/drm/i915/intel_uncore.c | 2 +- > >>> > 1 file changed, 1 insertion(+), 1 deletion(-) > >>> > > >>> > diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c > >>> > index 1d7b879cc68c..0529af7cfbb8 100644 > >>> > --- a/drivers/gpu/drm/i915/intel_uncore.c > >>> > +++ b/drivers/gpu/drm/i915/intel_uncore.c > >>> > @@ -1251,7 +1251,7 @@ static const struct register_whitelist { > >>> > } whitelist[] = { > >>> > { .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE), > >>> > .offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE), > >>> > - .size = 8, .gen_bitmask = GEN_RANGE(4, 9) }, > >>> > + .size = 8, .gen_bitmask = GEN_RANGE(4, 10) }, > >>> > >>> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > >>> > >> > >> Thanks! > >> > >>> I'd like to kill this GEN_RANGE since it is easy to forget when enabling > >>> a new platform. But this is topic for a different patch. > >>> > >>> > >> > >> Agreed. > >> > >>> > }; > >>> > > >>> > int i915_reg_read_ioctl(struct drm_device *dev, > >>> > >> _______________________________________________ > >> Intel-gfx mailing list > >> Intel-gfx@lists.freedesktop.org > >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > > > > > -- > > Rodrigo Vivi > > Blog: http://blog.vivi.eng.br > > > > -- > Rodrigo Vivi > Blog: http://blog.vivi.eng.br _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-09-06 20:13 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-09-05 18:45 [PATCH] drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register Nanley Chery 2017-09-05 19:04 ` ✗ Fi.CI.BAT: failure for " Patchwork 2017-09-05 19:04 ` [PATCH] " Vivi, Rodrigo 2017-09-06 18:26 ` Nanley Chery 2017-09-06 19:16 ` Rodrigo Vivi 2017-09-06 19:32 ` Rodrigo Vivi 2017-09-06 20:13 ` Nanley Chery
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