Re: [PATCH 2/2] drm/i915: Simplify i915_reg_read_ioctl

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Mon, Sep 11, 2017 at 01:49:18PM +0300, Joonas Lahtinen wrote:
> On Fri, 2017-09-08 at 15:24 +0300, Ville Syrjälä wrote:
> > On Fri, Sep 08, 2017 at 12:29:35PM +0300, Joonas Lahtinen wrote:
> > > @@ -1292,72 +1292,71 @@ void intel_uncore_fini(struct drm_i915_private *dev_priv)
> > >  	intel_uncore_forcewake_reset(dev_priv, false);
> > >  }
> > >  
> > > -#define GEN_RANGE(l, h) GENMASK((h) - 1, (l) - 1)
> > > -
> > > -static const struct register_whitelist {
> > > -	i915_reg_t offset_ldw, offset_udw;
> > > -	uint32_t size;
> > > -	/* supported gens, 0x10 for 4, 0x30 for 4 and 5, etc. */
> > > -	uint32_t gen_bitmask;
> > > -} whitelist[] = {
> > > -	{ .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
> > > -	  .offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE),
> > > -	  .size = 8, .gen_bitmask = GEN_RANGE(4, 10) },
> > > -};
> > > +static const struct reg_whitelist {
> > > +	i915_reg_t offset_ldw;
> > > +	i915_reg_t offset_udw;
> > > +	unsigned long gen_mask;
> > 
> > 'long' seems like a bad type for something like this. Changes size on 32
> > vs 64 bit. Also we could make do with 16 bits for now, though with
> > the single whitelist entry this only has a small impact.
> 
> It's actually the type GCC wants because GENMASK is used internally to
> produce the mask, otherwise it complained.

Hmm. Complained about what? We're not truncating anything with an
explicit smaller type, so I have a hard time seeing why gcc would
object to it.

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx