From: Tvrtko Ursulin <tursulin@ursulin.net>
To: Intel-gfx@lists.freedesktop.org
Cc: Peter Zijlstra <peterz@infradead.org>
Subject: [RFC 01/11] drm/i915: Convert intel_rc6_residency_us to ns
Date: Mon, 11 Sep 2017 16:25:49 +0100 [thread overview]
Message-ID: <20170911152559.7077-2-tvrtko.ursulin@linux.intel.com> (raw)
In-Reply-To: <20170911152559.7077-1-tvrtko.ursulin@linux.intel.com>
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Will be used for exposing the PMU counters.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 8 +++++++-
drivers/gpu/drm/i915/intel_pm.c | 23 +++++++++--------------
2 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d07d1109e784..dbd054e88ca2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -4114,9 +4114,15 @@ void vlv_phy_reset_lanes(struct intel_encoder *encoder);
int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);
int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
-u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv,
+u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv,
const i915_reg_t reg);
+static inline u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv,
+ const i915_reg_t reg)
+{
+ return DIV_ROUND_UP_ULL(intel_rc6_residency_ns(dev_priv, reg), 1000);
+}
+
#define I915_READ8(reg) dev_priv->uncore.funcs.mmio_readb(dev_priv, (reg), true)
#define I915_WRITE8(reg, val) dev_priv->uncore.funcs.mmio_writeb(dev_priv, (reg), (val), true)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index fa9055a4f790..60461f49936b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -9343,10 +9343,10 @@ static u64 vlv_residency_raw(struct drm_i915_private *dev_priv,
return lower | (u64)upper << 8;
}
-u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv,
+u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv,
const i915_reg_t reg)
{
- u64 time_hw, units, div;
+ u64 res;
if (!intel_enable_rc6())
return 0;
@@ -9355,22 +9355,17 @@ u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv,
/* On VLV and CHV, residency time is in CZ units rather than 1.28us */
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
- units = 1000;
- div = dev_priv->czclk_freq;
+ res = vlv_residency_raw(dev_priv, reg);
+ res = DIV_ROUND_UP_ULL(res * 1000000, dev_priv->czclk_freq);
- time_hw = vlv_residency_raw(dev_priv, reg);
- } else if (IS_GEN9_LP(dev_priv)) {
- units = 1000;
- div = 1200; /* 833.33ns */
-
- time_hw = I915_READ(reg);
} else {
- units = 128000; /* 1.28us */
- div = 100000;
+ /* 833.33ns units on Gen9LP, 1.28us elsewhere. */
+ unsigned int unit = IS_GEN9_LP(dev_priv) ? 833 : 1280;
- time_hw = I915_READ(reg);
+ res = (u64)I915_READ(reg) * unit;
}
intel_runtime_pm_put(dev_priv);
- return DIV_ROUND_UP_ULL(time_hw * units, div);
+
+ return res;
}
--
2.9.5
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next prev parent reply other threads:[~2017-09-11 15:26 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-11 15:25 [RFC v3 00/11] i915 PMU and engine busy stats Tvrtko Ursulin
2017-09-11 15:25 ` Tvrtko Ursulin [this message]
2017-09-14 19:48 ` [RFC 01/11] drm/i915: Convert intel_rc6_residency_us to ns Chris Wilson
2017-09-11 15:25 ` [RFC 02/11] drm/i915: Add intel_energy_uJ Tvrtko Ursulin
2017-09-14 19:49 ` Chris Wilson
2017-09-15 9:18 ` Tvrtko Ursulin
2017-09-14 20:36 ` Ville Syrjälä
2017-09-15 6:56 ` Tvrtko Ursulin
2017-09-15 8:51 ` Chris Wilson
2017-09-15 10:07 ` Tvrtko Ursulin
2017-09-15 10:34 ` Ville Syrjälä
2017-09-15 10:38 ` Chris Wilson
2017-09-15 11:16 ` Tvrtko Ursulin
2017-09-11 15:25 ` [RFC 03/11] drm/i915: Extract intel_get_cagf Tvrtko Ursulin
2017-09-14 19:51 ` Chris Wilson
2017-09-11 15:25 ` [RFC 04/11] drm/i915/pmu: Expose a PMU interface for perf queries Tvrtko Ursulin
2017-09-12 2:06 ` Rogozhkin, Dmitry V
2017-09-12 14:59 ` Tvrtko Ursulin
2017-09-13 8:57 ` [RFC v6 " Tvrtko Ursulin
2017-09-13 10:34 ` [RFC v7 " Tvrtko Ursulin
2017-09-15 0:00 ` Rogozhkin, Dmitry V
2017-09-15 7:57 ` Tvrtko Ursulin
2017-09-14 19:46 ` [RFC " Chris Wilson
2017-09-11 15:25 ` [RFC 05/11] drm/i915/pmu: Suspend sampling when GPU is idle Tvrtko Ursulin
2017-09-13 10:34 ` [RFC v5 " Tvrtko Ursulin
2017-09-14 19:57 ` Chris Wilson
2017-09-15 9:22 ` Tvrtko Ursulin
2017-09-11 15:25 ` [RFC 06/11] drm/i915: Wrap context schedule notification Tvrtko Ursulin
2017-09-11 15:25 ` [RFC 07/11] drm/i915: Engine busy time tracking Tvrtko Ursulin
2017-09-14 20:16 ` Chris Wilson
2017-09-15 9:45 ` Tvrtko Ursulin
2017-09-11 15:25 ` [RFC 08/11] drm/i915: Export engine busy stats in debugfs Tvrtko Ursulin
2017-09-14 20:17 ` Chris Wilson
2017-09-15 9:46 ` Tvrtko Ursulin
2017-09-11 15:25 ` [RFC 09/11] drm/i915/pmu: Wire up engine busy stats to PMU Tvrtko Ursulin
2017-09-11 15:25 ` [RFC 10/11] drm/i915: Export engine stats API to other users Tvrtko Ursulin
2017-09-12 18:35 ` Ben Widawsky
2017-09-14 20:26 ` Chris Wilson
2017-09-15 9:49 ` Tvrtko Ursulin
2017-09-19 19:50 ` Ben Widawsky
2017-09-19 20:11 ` Rogozhkin, Dmitry V
2017-09-29 10:59 ` Joonas Lahtinen
2017-09-11 15:25 ` [RFC 11/11] drm/i915: Gate engine stats collection with a static key Tvrtko Ursulin
2017-09-13 12:18 ` [RFC v3 " Tvrtko Ursulin
2017-09-14 20:22 ` Chris Wilson
2017-09-15 9:51 ` Tvrtko Ursulin
2017-09-11 15:50 ` ✗ Fi.CI.BAT: warning for i915 PMU and engine busy stats (rev3) Patchwork
2017-09-12 2:03 ` [RFC v3 00/11] i915 PMU and engine busy stats Rogozhkin, Dmitry V
2017-09-12 14:54 ` Tvrtko Ursulin
2017-09-12 22:01 ` Rogozhkin, Dmitry V
2017-09-13 8:54 ` [RFC v6 04/11] drm/i915/pmu: Expose a PMU interface for perf queries Tvrtko Ursulin
2017-09-13 9:01 ` [RFC v3 00/11] i915 PMU and engine busy stats Tvrtko Ursulin
2017-09-13 9:34 ` ✗ Fi.CI.BAT: warning for i915 PMU and engine busy stats (rev4) Patchwork
2017-09-13 10:46 ` ✗ Fi.CI.BAT: failure for i915 PMU and engine busy stats (rev6) Patchwork
2017-09-13 13:27 ` ✓ Fi.CI.BAT: success for i915 PMU and engine busy stats (rev7) Patchwork
2017-09-13 21:24 ` ✓ Fi.CI.IGT: " Patchwork
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