[PATCH 0/4] 2-in-1: Organize feature inheritance and disable IPC.

[PATCH 0/4] 2-in-1: Organize feature inheritance and disable IPC.

[Rodrigo Vivi]

I had a chicken and egg problem here. Specially because I want CI to test
everything and patches had interdependency.

On the platform/features organization side we can go further and
organize gen7_lp and gen8_lp inheriting g75_features and gen8_features
respectively. But let's at least start this organization with the thing
that is currently impacting developers plus the glk_color that was
easy enough and non-risky.

Thanks,
Rodrigo.

Rodrigo Vivi (4):
  drm/i915/skl: Fix has_ipc on skl and document WaDisableIPC.
  drm/i915: Organize GEN features inheritance.
  drm/i915: Organize GLK_COLORS.
  drm/i915: Extend WaDisableIPC to all platforms.

 drivers/gpu/drm/i915/i915_pci.c | 53 ++++++++++++++++++++---------------------
 drivers/gpu/drm/i915/intel_pm.c |  6 +++++
 2 files changed, 32 insertions(+), 27 deletions(-)

-- 
2.13.5

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[PATCH 1/4] drm/i915/skl: Fix has_ipc on skl and document WaDisableIPC.

[Rodrigo Vivi]

According to Spec for SKL+: "Isochronous Priority Control.
If enabled, Display sends demoted requests once the transition
watermark is reached. If transition watermark is not enabled,
Display sends demoted requests when the display buffer is full."

The commit 'e57f1c02155f ("drm/i915/gen9+: Add has_ipc flag in
device info structure")' introduced that as gen9+ but missing many
SKL Skus.

I believe the reason for that is Spec also mentions workarounds for
SKL-ALL: "IPC (Isoch Priority Control) may cause underflows
WA: Do not enable IPC in register ARB_CTL2"

It seems lame to add the feature and forever disable it,
but it will avoid a mistake of enabling it when we are reorganizing
the feature definitions on i915_pci.c later.

It will also allow us to probably extend that workaround for
other platforms.

Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 1 +
 drivers/gpu/drm/i915/intel_pm.c | 6 ++++++
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index da60866b6628..df751a152057 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -426,6 +426,7 @@ static const struct intel_device_info intel_cherryview_info __initconst = {
 	.platform = INTEL_SKYLAKE, \
 	.has_csr = 1, \
 	.has_guc = 1, \
+	.has_ipc = 1, \
 	.ddb_size = 896
 
 static const struct intel_device_info intel_skylake_gt1_info __initconst = {
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 52c4c194aa51..ede871b7982e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5828,6 +5828,12 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
 {
 	u32 val;
 
+	/* Display WA #0477 WaDisableIPC: skl */
+	if (IS_SKYLAKE(dev_priv)) {
+		dev_priv->ipc_enabled = false;
+		return;
+	}
+
 	val = I915_READ(DISP_ARB_CTL2);
 
 	if (dev_priv->ipc_enabled)
-- 
2.13.5

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Re: [PATCH 1/4] drm/i915/skl: Fix has_ipc on skl and document WaDisableIPC.

[Mahesh Kumar]

[-- Attachment #1.1: Type: text/plain, Size: 2432 bytes --]

Hi,


On Friday 29 September 2017 12:21 AM, Rodrigo Vivi wrote:
> According to Spec for SKL+: "Isochronous Priority Control.
> If enabled, Display sends demoted requests once the transition
> watermark is reached. If transition watermark is not enabled,
> Display sends demoted requests when the display buffer is full."
>
> The commit 'e57f1c02155f ("drm/i915/gen9+: Add has_ipc flag in
> device info structure")' introduced that as gen9+ but missing many
> SKL Skus.
>
> I believe the reason for that is Spec also mentions workarounds for
> SKL-ALL: "IPC (Isoch Priority Control) may cause underflows
> WA: Do not enable IPC in register ARB_CTL2"
yes, it was intentional as you correctly pointed out WA #0477.
>
> It seems lame to add the feature and forever disable it,
> but it will avoid a mistake of enabling it when we are reorganizing
> the feature definitions on i915_pci.c later.
sounds Good,
>
> It will also allow us to probably extend that workaround for
> other platforms.
>
> Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_pci.c | 1 +
>   drivers/gpu/drm/i915/intel_pm.c | 6 ++++++
>   2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index da60866b6628..df751a152057 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -426,6 +426,7 @@ static const struct intel_device_info intel_cherryview_info __initconst = {
>   	.platform = INTEL_SKYLAKE, \
>   	.has_csr = 1, \
>   	.has_guc = 1, \
> +	.has_ipc = 1, \
>   	.ddb_size = 896
>   
>   static const struct intel_device_info intel_skylake_gt1_info __initconst = {
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 52c4c194aa51..ede871b7982e 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5828,6 +5828,12 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
>   {
>   	u32 val;
>   
> +	/* Display WA #0477 WaDisableIPC: skl */
> +	if (IS_SKYLAKE(dev_priv)) {
> +		dev_priv->ipc_enabled = false;
> +		return;
> +	}
> +
looks good to me.
Reviewed-by: Mahesh Kumar <mahesh1.kumar@intel.com>
-Mahesh
>   	val = I915_READ(DISP_ARB_CTL2);
>   
>   	if (dev_priv->ipc_enabled)


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[PATCH 2/4] drm/i915: Organize GEN features inheritance.

[Rodrigo Vivi]

As Chris noticed the current organization is confusing
and inheritance is not clear.

So, let's split it in GEN<n>_FEATURES <cdn>_PLATFORM
where new GEN inherit features from previous gens and
Platforms only use gen features plus what ever is specific
for that platform and shouldn't be passed on.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 48 +++++++++++++++++++----------------------
 1 file changed, 22 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index df751a152057..9b54aafa2a0b 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -329,7 +329,7 @@ static const struct intel_device_info intel_valleyview_info __initconst = {
 	CURSOR_OFFSETS
 };
 
-#define HSW_FEATURES  \
+#define G75_FEATURES  \
 	GEN7_FEATURES, \
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING, \
 	.has_ddi = 1, \
@@ -341,7 +341,7 @@ static const struct intel_device_info intel_valleyview_info __initconst = {
 	.has_runtime_pm = 1
 
 #define HSW_PLATFORM \
-	HSW_FEATURES, \
+	G75_FEATURES, \
 	.platform = INTEL_HASWELL, \
 	.has_l3_dpf = 1
 
@@ -360,8 +360,8 @@ static const struct intel_device_info intel_haswell_gt3_info __initconst = {
 	.gt = 3,
 };
 
-#define BDW_FEATURES \
-	HSW_FEATURES, \
+#define GEN8_FEATURES \
+	G75_FEATURES, \
 	BDW_COLORS, \
 	.has_logical_ring_contexts = 1, \
 	.has_full_48bit_ppgtt = 1, \
@@ -369,7 +369,7 @@ static const struct intel_device_info intel_haswell_gt3_info __initconst = {
 	.has_reset_engine = 1
 
 #define BDW_PLATFORM \
-	BDW_FEATURES, \
+	GEN8_FEATURES, \
 	.gen = 8, \
 	.platform = INTEL_BROADWELL
 
@@ -420,15 +420,18 @@ static const struct intel_device_info intel_cherryview_info __initconst = {
 	CHV_COLORS,
 };
 
-#define SKL_PLATFORM \
-	BDW_FEATURES, \
-	.gen = 9, \
-	.platform = INTEL_SKYLAKE, \
+#define GEN9_FEATURES \
+	GEN8_FEATURES, \
 	.has_csr = 1, \
 	.has_guc = 1, \
 	.has_ipc = 1, \
 	.ddb_size = 896
 
+#define SKL_PLATFORM \
+	GEN9_FEATURES, \
+	.gen = 9, \
+	.platform = INTEL_SKYLAKE
+
 static const struct intel_device_info intel_skylake_gt1_info __initconst = {
 	SKL_PLATFORM,
 	.gt = 1,
@@ -496,13 +499,9 @@ static const struct intel_device_info intel_geminilake_info __initconst = {
 };
 
 #define KBL_PLATFORM \
-	BDW_FEATURES, \
+	GEN9_FEATURES, \
 	.gen = 9, \
-	.platform = INTEL_KABYLAKE, \
-	.has_csr = 1, \
-	.has_guc = 1, \
-	.has_ipc = 1, \
-	.ddb_size = 896
+	.platform = INTEL_KABYLAKE
 
 static const struct intel_device_info intel_kabylake_gt1_info __initconst = {
 	KBL_PLATFORM,
@@ -521,13 +520,9 @@ static const struct intel_device_info intel_kabylake_gt3_info __initconst = {
 };
 
 #define CFL_PLATFORM \
-	BDW_FEATURES, \
+	GEN9_FEATURES, \
 	.gen = 9, \
-	.platform = INTEL_COFFEELAKE, \
-	.has_csr = 1, \
-	.has_guc = 1, \
-	.has_ipc = 1, \
-	.ddb_size = 896
+	.platform = INTEL_COFFEELAKE
 
 static const struct intel_device_info intel_coffeelake_gt1_info __initconst = {
 	CFL_PLATFORM,
@@ -545,16 +540,17 @@ static const struct intel_device_info intel_coffeelake_gt3_info __initconst = {
 	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
 };
 
+#define GEN10_FEATURES \
+	GEN9_FEATURES, \
+	.ddb_size = 1024, \
+	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
+
 static const struct intel_device_info intel_cannonlake_gt2_info __initconst = {
-	BDW_FEATURES,
+	GEN10_FEATURES,
 	.is_alpha_support = 1,
 	.platform = INTEL_CANNONLAKE,
 	.gen = 10,
 	.gt = 2,
-	.ddb_size = 1024,
-	.has_csr = 1,
-	.has_ipc = 1,
-	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
 };
 
 /*
-- 
2.13.5

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Re: [PATCH 2/4] drm/i915: Organize GEN features inheritance.

[Chris Wilson]

Quoting Rodrigo Vivi (2017-09-28 19:51:46)
> As Chris noticed the current organization is confusing
> and inheritance is not clear.
> 
> So, let's split it in GEN<n>_FEATURES <cdn>_PLATFORM
> where new GEN inherit features from previous gens and
> Platforms only use gen features plus what ever is specific
> for that platform and shouldn't be passed on.
> 
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

One might argue that .gen=9 is a GEN9_FEATURE ;)
-Chris
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Re: [PATCH 2/4] drm/i915: Organize GEN features inheritance.

[Rodrigo Vivi]

On Thu, Sep 28, 2017 at 07:03:36PM +0000, Chris Wilson wrote:
> Quoting Rodrigo Vivi (2017-09-28 19:51:46)
> > As Chris noticed the current organization is confusing
> > and inheritance is not clear.
> > 
> > So, let's split it in GEN<n>_FEATURES <cdn>_PLATFORM
> > where new GEN inherit features from previous gens and
> > Platforms only use gen features plus what ever is specific
> > for that platform and shouldn't be passed on.
> > 
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> 
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> 
> One might argue that .gen=9 is a GEN9_FEATURE ;)

I confess I'm always in doubt about that... also
gen 7 is not in sync so whatever we decide needs to be
same for all gens... but this is for later along with gen7_lp
and gen8_lp organization...

> -Chris
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[PATCH 3/4] drm/i915: Organize GLK_COLORS.

[Rodrigo Vivi]

Let's organize this in a way that it gets more obvious
when looking to the platform colors and in a easier
way to get inherited.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 9b54aafa2a0b..10537dcdd9c1 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -54,6 +54,8 @@
 	.color = { .degamma_lut_size = 512, .gamma_lut_size = 512 }
 #define CHV_COLORS \
 	.color = { .degamma_lut_size = 65, .gamma_lut_size = 257 }
+#define GLK_COLORS \
+	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
 
 /* Keep in gen based order, and chronological order within a gen */
 #define GEN2_FEATURES \
@@ -495,7 +497,7 @@ static const struct intel_device_info intel_geminilake_info __initconst = {
 	GEN9_LP_FEATURES,
 	.platform = INTEL_GEMINILAKE,
 	.ddb_size = 1024,
-	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
+	GLK_COLORS
 };
 
 #define KBL_PLATFORM \
@@ -543,7 +545,7 @@ static const struct intel_device_info intel_coffeelake_gt3_info __initconst = {
 #define GEN10_FEATURES \
 	GEN9_FEATURES, \
 	.ddb_size = 1024, \
-	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
+	GLK_COLORS
 
 static const struct intel_device_info intel_cannonlake_gt2_info __initconst = {
 	GEN10_FEATURES,
-- 
2.13.5

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Re: [PATCH 3/4] drm/i915: Organize GLK_COLORS.

[Chris Wilson]

Quoting Rodrigo Vivi (2017-09-28 19:51:47)
> Let's organize this in a way that it gets more obvious
> when looking to the platform colors and in a easier
> way to get inherited.
> 
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Lgtm,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [PATCH 3/4] drm/i915: Organize GLK_COLORS.

[Jani Nikula]

On Thu, 28 Sep 2017, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> Let's organize this in a way that it gets more obvious
> when looking to the platform colors and in a easier
> way to get inherited.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 9b54aafa2a0b..10537dcdd9c1 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -54,6 +54,8 @@
>  	.color = { .degamma_lut_size = 512, .gamma_lut_size = 512 }
>  #define CHV_COLORS \
>  	.color = { .degamma_lut_size = 65, .gamma_lut_size = 257 }
> +#define GLK_COLORS \
> +	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
>  
>  /* Keep in gen based order, and chronological order within a gen */
>  #define GEN2_FEATURES \
> @@ -495,7 +497,7 @@ static const struct intel_device_info intel_geminilake_info __initconst = {
>  	GEN9_LP_FEATURES,
>  	.platform = INTEL_GEMINILAKE,
>  	.ddb_size = 1024,
> -	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
> +	GLK_COLORS

Please add he comma at the end.

>  };
>  
>  #define KBL_PLATFORM \
> @@ -543,7 +545,7 @@ static const struct intel_device_info intel_coffeelake_gt3_info __initconst = {
>  #define GEN10_FEATURES \
>  	GEN9_FEATURES, \
>  	.ddb_size = 1024, \
> -	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
> +	GLK_COLORS

Ditto.

BR,
Jani.

>  
>  static const struct intel_device_info intel_cannonlake_gt2_info __initconst = {
>  	GEN10_FEATURES,

-- 
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Re: [PATCH 3/4] drm/i915: Organize GLK_COLORS.

[Rodrigo Vivi]

On Mon, Oct 02, 2017 at 01:02:28PM +0000, Jani Nikula wrote:
> On Thu, 28 Sep 2017, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> > Let's organize this in a way that it gets more obvious
> > when looking to the platform colors and in a easier
> > way to get inherited.
> >
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_pci.c | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > index 9b54aafa2a0b..10537dcdd9c1 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -54,6 +54,8 @@
> >  	.color = { .degamma_lut_size = 512, .gamma_lut_size = 512 }
> >  #define CHV_COLORS \
> >  	.color = { .degamma_lut_size = 65, .gamma_lut_size = 257 }
> > +#define GLK_COLORS \
> > +	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
> >  
> >  /* Keep in gen based order, and chronological order within a gen */
> >  #define GEN2_FEATURES \
> > @@ -495,7 +497,7 @@ static const struct intel_device_info intel_geminilake_info __initconst = {
> >  	GEN9_LP_FEATURES,
> >  	.platform = INTEL_GEMINILAKE,
> >  	.ddb_size = 1024,
> > -	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
> > +	GLK_COLORS
> 
> Please add he comma at the end.
> 
> >  };
> >  
> >  #define KBL_PLATFORM \
> > @@ -543,7 +545,7 @@ static const struct intel_device_info intel_coffeelake_gt3_info __initconst = {
> >  #define GEN10_FEATURES \
> >  	GEN9_FEATURES, \
> >  	.ddb_size = 1024, \
> > -	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
> > +	GLK_COLORS

this one here doesn't compile. it is inside a define...

So, I have a:
"v2: Add comma at the end (Jani), when possible." here

but I'm not sure about that since comma here is not really needed, also it wasn't there with the .color
and it is not symmetric anymore...

> 
> Ditto.
> 
> BR,
> Jani.
> 
> >  
> >  static const struct intel_device_info intel_cannonlake_gt2_info __initconst = {
> >  	GEN10_FEATURES,
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center
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Re: [PATCH 3/4] drm/i915: Organize GLK_COLORS.

[Jani Nikula]

On Mon, 02 Oct 2017, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Mon, Oct 02, 2017 at 01:02:28PM +0000, Jani Nikula wrote:
>> On Thu, 28 Sep 2017, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
>> > Let's organize this in a way that it gets more obvious
>> > when looking to the platform colors and in a easier
>> > way to get inherited.
>> >
>> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> > ---
>> >  drivers/gpu/drm/i915/i915_pci.c | 6 ++++--
>> >  1 file changed, 4 insertions(+), 2 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>> > index 9b54aafa2a0b..10537dcdd9c1 100644
>> > --- a/drivers/gpu/drm/i915/i915_pci.c
>> > +++ b/drivers/gpu/drm/i915/i915_pci.c
>> > @@ -54,6 +54,8 @@
>> >  	.color = { .degamma_lut_size = 512, .gamma_lut_size = 512 }
>> >  #define CHV_COLORS \
>> >  	.color = { .degamma_lut_size = 65, .gamma_lut_size = 257 }
>> > +#define GLK_COLORS \
>> > +	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
>> >  
>> >  /* Keep in gen based order, and chronological order within a gen */
>> >  #define GEN2_FEATURES \
>> > @@ -495,7 +497,7 @@ static const struct intel_device_info intel_geminilake_info __initconst = {
>> >  	GEN9_LP_FEATURES,
>> >  	.platform = INTEL_GEMINILAKE,
>> >  	.ddb_size = 1024,
>> > -	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
>> > +	GLK_COLORS
>> 
>> Please add he comma at the end.
>> 
>> >  };
>> >  
>> >  #define KBL_PLATFORM \
>> > @@ -543,7 +545,7 @@ static const struct intel_device_info intel_coffeelake_gt3_info __initconst = {
>> >  #define GEN10_FEATURES \
>> >  	GEN9_FEATURES, \
>> >  	.ddb_size = 1024, \
>> > -	.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
>> > +	GLK_COLORS
>
> this one here doesn't compile. it is inside a define...
>
> So, I have a:
> "v2: Add comma at the end (Jani), when possible." here

Oops, yeah, only when applicable. :)

BR,
Jani.


>
> but I'm not sure about that since comma here is not really needed, also it wasn't there with the .color
> and it is not symmetric anymore...
>
>> 
>> Ditto.
>> 
>> BR,
>> Jani.
>> 
>> >  
>> >  static const struct intel_device_info intel_cannonlake_gt2_info __initconst = {
>> >  	GEN10_FEATURES,
>> 
>> -- 
>> Jani Nikula, Intel Open Source Technology Center

-- 
Jani Nikula, Intel Open Source Technology Center
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[PATCH 4/4] drm/i915: Extend WaDisableIPC to all platforms.

[Rodrigo Vivi]

Although Bspec state this Workaround is only relevant for SKL:All.

The wa_database state this is needed for All platforms from SKL to CNL.

So let's pick the safest case.

Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ede871b7982e..27f9d5ab2d23 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5828,8 +5828,8 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
 {
 	u32 val;
 
-	/* Display WA #0477 WaDisableIPC: skl */
-	if (IS_SKYLAKE(dev_priv)) {
+	/* Display WA #0477 WaDisableIPC: skl,kbl,bxt,glk,cfl,cnl */
+	if (INTEL_GEN(dev_priv) <= 10) {
 		dev_priv->ipc_enabled = false;
 		return;
 	}
-- 
2.13.5

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Re: [PATCH 4/4] drm/i915: Extend WaDisableIPC to all platforms.

[Chris Wilson]

Quoting Rodrigo Vivi (2017-09-28 19:51:48)
> Although Bspec state this Workaround is only relevant for SKL:All.
> 
> The wa_database state this is needed for All platforms from SKL to CNL.
> 
> So let's pick the safest case.
> 
> Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index ede871b7982e..27f9d5ab2d23 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5828,8 +5828,8 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
>  {
>         u32 val;
>  
> -       /* Display WA #0477 WaDisableIPC: skl */
> -       if (IS_SKYLAKE(dev_priv)) {
> +       /* Display WA #0477 WaDisableIPC: skl,kbl,bxt,glk,cfl,cnl */
> +       if (INTEL_GEN(dev_priv) <= 10) {

But at that point, why not just define has_ipc as a gen10 feature? You
can have a comment before gen9 feature that although IPC was introduced
for gen9, it is recommended (w/a) to leave disabled.
-Chris
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Re: [PATCH 4/4] drm/i915: Extend WaDisableIPC to all platforms.

[Rodrigo Vivi]

On Thu, Sep 28, 2017 at 07:02:59PM +0000, Chris Wilson wrote:
> Quoting Rodrigo Vivi (2017-09-28 19:51:48)
> > Although Bspec state this Workaround is only relevant for SKL:All.
> > 
> > The wa_database state this is needed for All platforms from SKL to CNL.
> > 
> > So let's pick the safest case.
> > 
> > Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index ede871b7982e..27f9d5ab2d23 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -5828,8 +5828,8 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
> >  {
> >         u32 val;
> >  
> > -       /* Display WA #0477 WaDisableIPC: skl */
> > -       if (IS_SKYLAKE(dev_priv)) {
> > +       /* Display WA #0477 WaDisableIPC: skl,kbl,bxt,glk,cfl,cnl */
> > +       if (INTEL_GEN(dev_priv) <= 10) {
> 
> But at that point, why not just define has_ipc as a gen10 feature?

it's already there...

> You
> can have a comment before gen9 feature that although IPC was introduced
> for gen9, it is recommended (w/a) to leave disabled.

so you mean moving this Wa from here to set has_ipc = 0 to all platforms?

Anyways I'd like to hear from Manesh about it since this basically revert
all IPC work for all platforms...

> -Chris
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Re: [PATCH 4/4] drm/i915: Extend WaDisableIPC to all platforms.

[Chris Wilson]

Quoting Rodrigo Vivi (2017-09-28 20:12:14)
> On Thu, Sep 28, 2017 at 07:02:59PM +0000, Chris Wilson wrote:
> > Quoting Rodrigo Vivi (2017-09-28 19:51:48)
> > > Although Bspec state this Workaround is only relevant for SKL:All.
> > > 
> > > The wa_database state this is needed for All platforms from SKL to CNL.
> > > 
> > > So let's pick the safest case.
> > > 
> > > Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
> > > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_pm.c | 4 ++--
> > >  1 file changed, 2 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > index ede871b7982e..27f9d5ab2d23 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -5828,8 +5828,8 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
> > >  {
> > >         u32 val;
> > >  
> > > -       /* Display WA #0477 WaDisableIPC: skl */
> > > -       if (IS_SKYLAKE(dev_priv)) {
> > > +       /* Display WA #0477 WaDisableIPC: skl,kbl,bxt,glk,cfl,cnl */
> > > +       if (INTEL_GEN(dev_priv) <= 10) {
> > 
> > But at that point, why not just define has_ipc as a gen10 feature?
> 
> it's already there...
> 
> > You
> > can have a comment before gen9 feature that although IPC was introduced
> > for gen9, it is recommended (w/a) to leave disabled.
> 
> so you mean moving this Wa from here to set has_ipc = 0 to all platforms?
> 
> Anyways I'd like to hear from Manesh about it since this basically revert
> all IPC work for all platforms...

Just the gen9 platforms, gen10+ enables it.
-Chris
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Re: [PATCH 4/4] drm/i915: Extend WaDisableIPC to all platforms.

[Mahesh Kumar]

Hi,

sorry for late reply, it was India site holiday.

On Friday 29 September 2017 12:42 AM, Rodrigo Vivi wrote:
> On Thu, Sep 28, 2017 at 07:02:59PM +0000, Chris Wilson wrote:
>> Quoting Rodrigo Vivi (2017-09-28 19:51:48)
>>> Although Bspec state this Workaround is only relevant for SKL:All.
>>>
>>> The wa_database state this is needed for All platforms from SKL to CNL.
>>>
>>> So let's pick the safest case.
>>>
>>> Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
>>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>>> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>>> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/intel_pm.c | 4 ++--
>>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>>> index ede871b7982e..27f9d5ab2d23 100644
>>> --- a/drivers/gpu/drm/i915/intel_pm.c
>>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>>> @@ -5828,8 +5828,8 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
>>>   {
>>>          u32 val;
>>>   
>>> -       /* Display WA #0477 WaDisableIPC: skl */
>>> -       if (IS_SKYLAKE(dev_priv)) {
>>> +       /* Display WA #0477 WaDisableIPC: skl,kbl,bxt,glk,cfl,cnl */
>>> +       if (INTEL_GEN(dev_priv) <= 10) {
WA #0477 asks us to disable IPC for SKL:ALL, for all other GEN9 variant 
it should be enabled.
Enabling IPC improves performance of other memory clients, as without 
IPC enabled display always fetches from memory with High-priority.

-Mahesh
>> But at that point, why not just define has_ipc as a gen10 feature?
> it's already there...
>
>> You
>> can have a comment before gen9 feature that although IPC was introduced
>> for gen9, it is recommended (w/a) to leave disabled.
> so you mean moving this Wa from here to set has_ipc = 0 to all platforms?
>
> Anyways I'd like to hear from Manesh about it since this basically revert
> all IPC work for all platforms...
>
>> -Chris

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Re: [PATCH 4/4] drm/i915: Extend WaDisableIPC to all platforms.

[Rodrigo Vivi]

On Tue, Oct 03, 2017 at 05:27:29AM +0000, Mahesh Kumar wrote:
> Hi,
> 
> sorry for late reply, it was India site holiday.
> 
> On Friday 29 September 2017 12:42 AM, Rodrigo Vivi wrote:
> > On Thu, Sep 28, 2017 at 07:02:59PM +0000, Chris Wilson wrote:
> > > Quoting Rodrigo Vivi (2017-09-28 19:51:48)
> > > > Although Bspec state this Workaround is only relevant for SKL:All.
> > > > 
> > > > The wa_database state this is needed for All platforms from SKL to CNL.
> > > > 
> > > > So let's pick the safest case.
> > > > 
> > > > Cc: Mahesh Kumar <mahesh1.kumar@intel.com>
> > > > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > > > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > ---
> > > >   drivers/gpu/drm/i915/intel_pm.c | 4 ++--
> > > >   1 file changed, 2 insertions(+), 2 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > > index ede871b7982e..27f9d5ab2d23 100644
> > > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > > @@ -5828,8 +5828,8 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
> > > >   {
> > > >          u32 val;
> > > > -       /* Display WA #0477 WaDisableIPC: skl */
> > > > -       if (IS_SKYLAKE(dev_priv)) {
> > > > +       /* Display WA #0477 WaDisableIPC: skl,kbl,bxt,glk,cfl,cnl */
> > > > +       if (INTEL_GEN(dev_priv) <= 10) {
> WA #0477 asks us to disable IPC for SKL:ALL, for all other GEN9 variant it
> should be enabled.
> Enabling IPC improves performance of other memory clients, as without IPC
> enabled display always fetches from memory with High-priority.

Well, recently Samu's team noticed a perf difference from CFL compared to SKL...
related to memory latency... And this here seems to be the only difference that I
could spot...
And it is globally disabled according to wa_database... what would explain the gap
even further...

Anyways I re-submit the series without this patch so we can continue tests and
discussions only around this patch and we move along with other patches on that
series.

Thanks for the review and comments,
Rodrigo.

> 
> -Mahesh
> > > But at that point, why not just define has_ipc as a gen10 feature?
> > it's already there...
> > 
> > > You
> > > can have a comment before gen9 feature that although IPC was introduced
> > > for gen9, it is recommended (w/a) to leave disabled.
> > so you mean moving this Wa from here to set has_ipc = 0 to all platforms?
> > 
> > Anyways I'd like to hear from Manesh about it since this basically revert
> > all IPC work for all platforms...
> > 
> > > -Chris
> 
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✗ Fi.CI.BAT: failure for 2-in-1: Organize feature inheritance and disable IPC.

[Patchwork]

== Series Details ==

Series: 2-in-1: Organize feature inheritance and disable IPC.
URL   : https://patchwork.freedesktop.org/series/31090/
State : failure

== Summary ==

Series 31090v1 2-in-1: Organize feature inheritance and disable IPC.
https://patchwork.freedesktop.org/api/1.0/series/31090/revisions/1/mbox/

Test kms_busy:
        Subgroup basic-flip-b:
                pass       -> INCOMPLETE (fi-bxt-j4205)
Test drv_module_reload:
        Subgroup basic-reload:
                pass       -> DMESG-WARN (fi-cfl-s) k.org#196765

k.org#196765 https://bugzilla.kernel.org/show_bug.cgi?id=196765

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:446s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:470s
fi-blb-e6850     total:289  pass:224  dwarn:1   dfail:0   fail:0   skip:64  time:422s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:512s
fi-bwr-2160      total:289  pass:184  dwarn:0   dfail:0   fail:0   skip:105 time:277s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:498s
fi-bxt-j4205     total:207  pass:185  dwarn:0   dfail:0   fail:0   skip:21 
fi-byt-j1900     total:289  pass:254  dwarn:1   dfail:0   fail:0   skip:34  time:500s
fi-byt-n2820     total:289  pass:250  dwarn:1   dfail:0   fail:0   skip:38  time:496s
fi-cfl-s         total:289  pass:255  dwarn:2   dfail:0   fail:0   skip:32  time:561s
fi-cnl-y         total:289  pass:260  dwarn:1   dfail:0   fail:1   skip:27  time:614s
fi-elk-e7500     total:289  pass:230  dwarn:0   dfail:0   fail:0   skip:59  time:416s
fi-glk-1         total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:572s
fi-hsw-4770      total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:425s
fi-hsw-4770r     total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:411s
fi-ilk-650       total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:429s
fi-ivb-3520m     total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:485s
fi-ivb-3770      total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:459s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:475s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:577s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:589s
fi-pnv-d510      total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:543s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:450s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:756s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:491s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:472s
fi-snb-2520m     total:289  pass:251  dwarn:0   dfail:0   fail:0   skip:38  time:567s
fi-snb-2600      total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:415s

7ae90fb62375c44bcccc198bdffe51c4dee432d4 drm-tip: 2017y-09m-28d-16h-52m-04s UTC integration manifest
771e51d5ea64 drm/i915: Extend WaDisableIPC to all platforms.
ab5c14ea07d2 drm/i915: Organize GLK_COLORS.
8cf8c22b308c drm/i915: Organize GEN features inheritance.
3109617523c2 drm/i915/skl: Fix has_ipc on skl and document WaDisableIPC.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5848/
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✓ Fi.CI.BAT: success for 2-in-1: Organize feature inheritance and disable IPC.

[Patchwork]

== Series Details ==

Series: 2-in-1: Organize feature inheritance and disable IPC.
URL   : https://patchwork.freedesktop.org/series/31090/
State : success

== Summary ==

Series 31090v1 2-in-1: Organize feature inheritance and disable IPC.
https://patchwork.freedesktop.org/api/1.0/series/31090/revisions/1/mbox/

Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-c:
                pass       -> INCOMPLETE (fi-kbl-7560u) fdo#102846
Test drv_module_reload:
        Subgroup basic-reload-inject:
                pass       -> DMESG-WARN (fi-glk-1) fdo#102777

fdo#102846 https://bugs.freedesktop.org/show_bug.cgi?id=102846
fdo#102777 https://bugs.freedesktop.org/show_bug.cgi?id=102777

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:442s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:472s
fi-blb-e6850     total:289  pass:224  dwarn:1   dfail:0   fail:0   skip:64  time:417s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:514s
fi-bwr-2160      total:289  pass:184  dwarn:0   dfail:0   fail:0   skip:105 time:278s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:496s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:507s
fi-byt-j1900     total:289  pass:254  dwarn:1   dfail:0   fail:0   skip:34  time:487s
fi-byt-n2820     total:289  pass:250  dwarn:1   dfail:0   fail:0   skip:38  time:488s
fi-cfl-s         total:289  pass:256  dwarn:1   dfail:0   fail:0   skip:32  time:568s
fi-cnl-y         total:289  pass:260  dwarn:1   dfail:0   fail:1   skip:27  time:620s
fi-elk-e7500     total:289  pass:230  dwarn:0   dfail:0   fail:0   skip:59  time:420s
fi-glk-1         total:289  pass:259  dwarn:1   dfail:0   fail:0   skip:29  time:567s
fi-hsw-4770      total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:424s
fi-hsw-4770r     total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:402s
fi-ilk-650       total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:428s
fi-ivb-3520m     total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:494s
fi-ivb-3770      total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:461s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:472s
fi-kbl-7560u     total:247  pass:230  dwarn:0   dfail:0   fail:0   skip:16 
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:590s
fi-pnv-d510      total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:540s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:451s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:753s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:496s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:477s
fi-snb-2520m     total:289  pass:251  dwarn:0   dfail:0   fail:0   skip:38  time:567s
fi-snb-2600      total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:416s

7ae90fb62375c44bcccc198bdffe51c4dee432d4 drm-tip: 2017y-09m-28d-16h-52m-04s UTC integration manifest
c699d2def182 drm/i915: Extend WaDisableIPC to all platforms.
c515074dfeaa drm/i915: Organize GLK_COLORS.
92d0768575ef drm/i915: Organize GEN features inheritance.
a8ec02db11f8 drm/i915/skl: Fix has_ipc on skl and document WaDisableIPC.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5849/
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✗ Fi.CI.IGT: failure for 2-in-1: Organize feature inheritance and disable IPC.

[Patchwork]

== Series Details ==

Series: 2-in-1: Organize feature inheritance and disable IPC.
URL   : https://patchwork.freedesktop.org/series/31090/
State : failure

== Summary ==

Test kms_setmode:
        Subgroup basic:
                pass       -> FAIL       (shard-hsw) fdo#99912
Test gem_tiled_pread_pwrite:
                pass       -> INCOMPLETE (shard-hsw)

fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912

shard-hsw        total:2382 pass:1304 dwarn:5   dfail:0   fail:10  skip:1062 time:9683s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5849/shards.html
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✓ Fi.CI.BAT: success for 2-in-1: Organize feature inheritance and disable IPC.

[Patchwork]

== Series Details ==

Series: 2-in-1: Organize feature inheritance and disable IPC.
URL   : https://patchwork.freedesktop.org/series/31090/
State : success

== Summary ==

Series 31090v1 2-in-1: Organize feature inheritance and disable IPC.
https://patchwork.freedesktop.org/api/1.0/series/31090/revisions/1/mbox/

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:459s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:476s
fi-blb-e6850     total:289  pass:224  dwarn:1   dfail:0   fail:0   skip:64  time:395s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:570s
fi-bwr-2160      total:289  pass:184  dwarn:0   dfail:0   fail:0   skip:105 time:288s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:534s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:541s
fi-byt-j1900     total:289  pass:254  dwarn:1   dfail:0   fail:0   skip:34  time:548s
fi-byt-n2820     total:289  pass:250  dwarn:1   dfail:0   fail:0   skip:38  time:521s
fi-cfl-s         total:289  pass:256  dwarn:1   dfail:0   fail:0   skip:32  time:560s
fi-cnl-y         total:289  pass:261  dwarn:1   dfail:0   fail:0   skip:27  time:614s
fi-elk-e7500     total:289  pass:230  dwarn:0   dfail:0   fail:0   skip:59  time:433s
fi-glk-1         total:289  pass:258  dwarn:3   dfail:0   fail:0   skip:28  time:597s
fi-hsw-4770      total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:438s
fi-hsw-4770r     total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:424s
fi-ilk-650       total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:466s
fi-ivb-3520m     total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:499s
fi-ivb-3770      total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:472s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:503s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:581s
fi-kbl-7567u     total:289  pass:265  dwarn:4   dfail:0   fail:0   skip:20  time:498s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:594s
fi-pnv-d510      total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:659s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:473s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:533s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:519s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:477s
fi-snb-2520m     total:289  pass:251  dwarn:0   dfail:0   fail:0   skip:38  time:591s
fi-snb-2600      total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:434s

14f3207683e165f826d0e5861944fc6f39e8e20f drm-tip: 2017y-10m-02d-20h-23m-38s UTC integration manifest
8da14f06fd4a drm/i915: Extend WaDisableIPC to all platforms.
37a80792833f drm/i915: Organize GLK_COLORS.
dcd1fd8d44c9 drm/i915: Organize GEN features inheritance.
9d19c7ea1a15 drm/i915/skl: Fix has_ipc on skl and document WaDisableIPC.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5873/
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