From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH 2/2] drm/i915/glk: Fix DMC/DC state idleness calculation
Date: Tue, 3 Oct 2017 12:51:59 +0300 [thread overview]
Message-ID: <20171003095159.711-2-imre.deak@intel.com> (raw)
In-Reply-To: <20171003095159.711-1-imre.deak@intel.com>
According to BSpec GLK like BXT needs to ignore the idle state of cores
before starting the DMC firmware's DC state handler.
Fixes: dbb28b5c3d3c ("drm/i915/DMC/GLK: Load DMC on GLK")
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/intel_csr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index cdfb624eb82d..ea5d5c9645a4 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -216,7 +216,7 @@ static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv)
mask = DC_STATE_DEBUG_MASK_MEMORY_UP;
- if (IS_BROXTON(dev_priv))
+ if (IS_GEN9_LP(dev_priv))
mask |= DC_STATE_DEBUG_MASK_CORES;
/* The below bit doesn't need to be cleared ever afterwards */
--
2.13.2
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next prev parent reply other threads:[~2017-10-03 9:52 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-03 9:51 [PATCH 1/2] drm/i915/cnl: Reprogram DMC firmware after S3/S4 resume Imre Deak
2017-10-03 9:51 ` Imre Deak [this message]
2017-10-03 17:47 ` [PATCH 2/2] drm/i915/glk: Fix DMC/DC state idleness calculation Rodrigo Vivi
2017-10-03 18:03 ` Imre Deak
2017-10-03 18:12 ` Rodrigo Vivi
2017-10-03 18:20 ` Rodrigo Vivi
2017-10-04 8:13 ` Imre Deak
2017-10-03 10:18 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/cnl: Reprogram DMC firmware after S3/S4 resume Patchwork
2017-10-04 8:52 ` Imre Deak
2017-10-03 17:40 ` [PATCH 1/2] " Rodrigo Vivi
2017-10-03 17:57 ` Imre Deak
2017-10-03 18:02 ` Rodrigo Vivi
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