public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915/glk: Fix DMC/DC state idleness calculation
Date: Tue, 3 Oct 2017 10:47:50 -0700	[thread overview]
Message-ID: <20171003174750.nxgb4vple7oku2on@intel.com> (raw)
In-Reply-To: <20171003095159.711-2-imre.deak@intel.com>

On Tue, Oct 03, 2017 at 09:51:59AM +0000, Imre Deak wrote:
> According to BSpec GLK like BXT needs to ignore the idle state of cores
> before starting the DMC firmware's DC state handler.

no mention on CNL there?

Btw I just saw that CNL DMC seems much more like BXT than like SKL.
Our code probably needs deeper changes...

> 
> Fixes: dbb28b5c3d3c ("drm/i915/DMC/GLK: Load DMC on GLK")
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_csr.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
> index cdfb624eb82d..ea5d5c9645a4 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -216,7 +216,7 @@ static void gen9_set_dc_state_debugmask(struct drm_i915_private *dev_priv)
>  
>  	mask = DC_STATE_DEBUG_MASK_MEMORY_UP;
>  
> -	if (IS_BROXTON(dev_priv))
> +	if (IS_GEN9_LP(dev_priv))
>  		mask |= DC_STATE_DEBUG_MASK_CORES;

I saw in spec for SKL+: "This field must be set to Mask prior to enabling DC5 or DC6"
So I believe this should be INTEL_GEN(dev_priv) >= 9... :/


>  
>  	/* The below bit doesn't need to be cleared ever afterwards */
> -- 
> 2.13.2
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2017-10-03 17:47 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-03  9:51 [PATCH 1/2] drm/i915/cnl: Reprogram DMC firmware after S3/S4 resume Imre Deak
2017-10-03  9:51 ` [PATCH 2/2] drm/i915/glk: Fix DMC/DC state idleness calculation Imre Deak
2017-10-03 17:47   ` Rodrigo Vivi [this message]
2017-10-03 18:03     ` Imre Deak
2017-10-03 18:12       ` Rodrigo Vivi
2017-10-03 18:20     ` Rodrigo Vivi
2017-10-04  8:13       ` Imre Deak
2017-10-03 10:18 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/cnl: Reprogram DMC firmware after S3/S4 resume Patchwork
2017-10-04  8:52   ` Imre Deak
2017-10-03 17:40 ` [PATCH 1/2] " Rodrigo Vivi
2017-10-03 17:57   ` Imre Deak
2017-10-03 18:02     ` Rodrigo Vivi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20171003174750.nxgb4vple7oku2on@intel.com \
    --to=rodrigo.vivi@intel.com \
    --cc=imre.deak@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox