From: Jani Nikula <jani.nikula@intel.com>
To: Jani Nikula <jani.nikula@intel.com>, intel-gfx@lists.freedesktop.org
Subject: [RFC PATCH] drm/i915: push shared dpll enable to encoders on DDI platforms
Date: Thu, 5 Oct 2017 14:50:13 +0300 [thread overview]
Message-ID: <20171005115013.11595-1-jani.nikula@intel.com> (raw)
In-Reply-To: <cover.1507200657.git.jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_crt.c | 3 +++
drivers/gpu/drm/i915/intel_ddi.c | 18 ++++++++++++++++++
drivers/gpu/drm/i915/intel_display.c | 3 ---
3 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 668e8c3e791d..b3094d606329 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -255,6 +255,9 @@ static void hsw_pre_pll_enable_crt(struct intel_encoder *encoder,
WARN_ON(!intel_crtc->config->has_pch_encoder);
intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
+
+ if (intel_crtc->config->shared_dpll)
+ intel_enable_shared_dpll(intel_crtc);
}
static void hsw_pre_enable_crt(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index f1adc2544ab9..c1152c602f08 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2407,13 +2407,29 @@ static void intel_disable_ddi(struct intel_encoder *intel_encoder,
}
}
+static void intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
+ const struct intel_crtc_state *pipe_config,
+ const struct drm_connector_state *conn_state)
+{
+ struct drm_crtc *crtc = pipe_config->base.crtc;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+
+ if (intel_crtc->config->shared_dpll)
+ intel_enable_shared_dpll(intel_crtc);
+}
+
static void bxt_ddi_pre_pll_enable(struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
+ struct drm_crtc *crtc = pipe_config->base.crtc;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
uint8_t mask = pipe_config->lane_lat_optim_mask;
bxt_ddi_phy_set_lane_optim_mask(encoder, mask);
+
+ if (intel_crtc->config->shared_dpll)
+ intel_enable_shared_dpll(intel_crtc);
}
void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp)
@@ -2714,6 +2730,8 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
intel_encoder->enable = intel_enable_ddi;
if (IS_GEN9_LP(dev_priv))
intel_encoder->pre_pll_enable = bxt_ddi_pre_pll_enable;
+ else
+ intel_encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
intel_encoder->pre_enable = intel_ddi_pre_enable;
intel_encoder->disable = intel_disable_ddi;
intel_encoder->post_disable = intel_ddi_post_disable;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9f2bf3b3f759..6d0573350786 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5490,9 +5490,6 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
intel_encoders_pre_pll_enable(crtc, pipe_config, old_state);
- if (intel_crtc->config->shared_dpll)
- intel_enable_shared_dpll(intel_crtc);
-
if (intel_crtc_has_dp_encoder(intel_crtc->config))
intel_dp_set_m_n(intel_crtc, M1_N1);
--
2.11.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2017-10-05 11:50 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-05 10:52 [PATCH 0/5] drm/i915: push more stuff down to encoders on crtc enable/disable Jani Nikula
2017-10-05 10:52 ` [PATCH 1/5] drm/i915: push DDI CRT underrun reporting on enable to encoder Jani Nikula
2017-10-05 10:52 ` [PATCH 2/5] drm/i915: push DDI CRT underrun reporting on disable " Jani Nikula
2017-10-05 10:52 ` [PATCH 3/5] drm/i915: push DDI and DSI underrun reporting on enable " Jani Nikula
2017-10-05 15:21 ` Daniel Vetter
2017-10-05 10:52 ` [PATCH 4/5] drm/i915: push DDI FDI link training on enable to CRT encoder Jani Nikula
2017-10-05 10:52 ` [PATCH 5/5] drm/i915/crt: clean up encoder hook assignment Jani Nikula
2017-10-05 15:22 ` Daniel Vetter
2017-10-06 8:40 ` Jani Nikula
2017-10-05 11:18 ` ✓ Fi.CI.BAT: success for drm/i915: push more stuff down to encoders on crtc enable/disable (rev2) Patchwork
2017-10-05 11:50 ` Jani Nikula [this message]
2017-10-05 15:24 ` [RFC PATCH] drm/i915: push shared dpll enable to encoders on DDI platforms Daniel Vetter
2017-10-06 8:07 ` Daniel Vetter
2017-10-06 8:09 ` Daniel Vetter
2017-10-12 13:50 ` Jani Nikula
2017-10-05 12:23 ` ✓ Fi.CI.IGT: success for drm/i915: push shared dpll enable to encoders on DDI platforms (rev2) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171005115013.11595-1-jani.nikula@intel.com \
--to=jani.nikula@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox