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* [PATCH] drm/i915: s/sg_mask/sg_page_sizes/
@ 2017-10-09 11:00 Matthew Auld
  2017-10-09 11:34 ` Chris Wilson
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Matthew Auld @ 2017-10-09 11:00 UTC (permalink / raw)
  To: intel-gfx

It's a little unclear what the sg_mask actually is, so prefer the more
meaningful name of sg_page_sizes.

Suggested-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_drv.h               |  2 +-
 drivers/gpu/drm/i915/i915_gem.c               | 28 +++++++++++++--------------
 drivers/gpu/drm/i915/i915_gem_dmabuf.c        |  6 +++---
 drivers/gpu/drm/i915/i915_gem_internal.c      |  8 ++++----
 drivers/gpu/drm/i915/i915_gem_userptr.c       |  6 +++---
 drivers/gpu/drm/i915/selftests/huge_pages.c   | 18 ++++++++---------
 drivers/gpu/drm/i915/selftests/i915_gem_gtt.c |  8 ++++----
 7 files changed, 38 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 799a90abd81f..1566674cb203 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3537,7 +3537,7 @@ i915_gem_object_get_dma_address(struct drm_i915_gem_object *obj,
 
 void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
 				 struct sg_table *pages,
-				 unsigned int sg_mask);
+				 unsigned int sg_page_sizes);
 int __i915_gem_object_get_pages(struct drm_i915_gem_object *obj);
 
 static inline int __must_check
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 82a10036fb38..b79f74fd1324 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2310,7 +2310,7 @@ static int i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
 	struct page *page;
 	unsigned long last_pfn = 0;	/* suppress gcc warning */
 	unsigned int max_segment = i915_sg_segment_size();
-	unsigned int sg_mask;
+	unsigned int sg_page_sizes;
 	gfp_t noreclaim;
 	int ret;
 
@@ -2342,7 +2342,7 @@ static int i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
 
 	sg = st->sgl;
 	st->nents = 0;
-	sg_mask = 0;
+	sg_page_sizes = 0;
 	for (i = 0; i < page_count; i++) {
 		const unsigned int shrink[] = {
 			I915_SHRINK_BOUND | I915_SHRINK_UNBOUND | I915_SHRINK_PURGEABLE,
@@ -2396,7 +2396,7 @@ static int i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
 		    sg->length >= max_segment ||
 		    page_to_pfn(page) != last_pfn + 1) {
 			if (i) {
-				sg_mask |= sg->length;
+				sg_page_sizes |= sg->length;
 				sg = sg_next(sg);
 			}
 			st->nents++;
@@ -2410,7 +2410,7 @@ static int i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
 		WARN_ON((gfp & __GFP_DMA32) && (last_pfn >= 0x00100000UL));
 	}
 	if (sg) { /* loop terminated early; short sg table */
-		sg_mask |= sg->length;
+		sg_page_sizes |= sg->length;
 		sg_mark_end(sg);
 	}
 
@@ -2441,7 +2441,7 @@ static int i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
 	if (i915_gem_object_needs_bit17_swizzle(obj))
 		i915_gem_object_do_bit_17_swizzle(obj, st);
 
-	__i915_gem_object_set_pages(obj, st, sg_mask);
+	__i915_gem_object_set_pages(obj, st, sg_page_sizes);
 
 	return 0;
 
@@ -2469,7 +2469,7 @@ static int i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj)
 
 void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
 				 struct sg_table *pages,
-				 unsigned int sg_mask)
+				 unsigned int sg_page_sizes)
 {
 	struct drm_i915_private *i915 = to_i915(obj->base.dev);
 	unsigned long supported = INTEL_INFO(i915)->page_sizes;
@@ -2489,16 +2489,16 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
 		obj->mm.quirked = true;
 	}
 
-	GEM_BUG_ON(!sg_mask);
-	obj->mm.page_sizes.phys = sg_mask;
+	GEM_BUG_ON(!sg_page_sizes);
+	obj->mm.page_sizes.phys = sg_page_sizes;
 
 	/*
-	 * Calculate the supported page-sizes which fit into the given sg_mask.
-	 * This will give us the page-sizes which we may be able to use
-	 * opportunistically when later inserting into the GTT. For example if
-	 * phys=2G, then in theory we should be able to use 1G, 2M, 64K or 4K
-	 * pages, although in practice this will depend on a number of other
-	 * factors.
+	 * Calculate the supported page-sizes which fit into the given
+	 * sg_page_sizes.  This will give us the page-sizes which we may be able
+	 * to use opportunistically when later inserting into the GTT. For
+	 * example if phys=2G, then in theory we should be able to use 1G, 2M,
+	 * 64K or 4K pages, although in practice this will depend on a number of
+	 * other factors.
 	 */
 	obj->mm.page_sizes.sg = 0;
 	for_each_set_bit(i, &supported, ilog2(I915_GTT_MAX_PAGE_SIZE) + 1) {
diff --git a/drivers/gpu/drm/i915/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
index e542a9d80077..864439a214c8 100644
--- a/drivers/gpu/drm/i915/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/i915_gem_dmabuf.c
@@ -259,16 +259,16 @@ struct dma_buf *i915_gem_prime_export(struct drm_device *dev,
 static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
 {
 	struct sg_table *pages;
-	unsigned int sg_mask;
+	unsigned int sg_page_sizes;
 
 	pages = dma_buf_map_attachment(obj->base.import_attach,
 				       DMA_BIDIRECTIONAL);
 	if (IS_ERR(pages))
 		return PTR_ERR(pages);
 
-	sg_mask = i915_sg_page_sizes(pages->sgl);
+	sg_page_sizes = i915_sg_page_sizes(pages->sgl);
 
-	__i915_gem_object_set_pages(obj, pages, sg_mask);
+	__i915_gem_object_set_pages(obj, pages, sg_page_sizes);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/i915_gem_internal.c b/drivers/gpu/drm/i915/i915_gem_internal.c
index bdc23c4c8783..ee83ec838ee7 100644
--- a/drivers/gpu/drm/i915/i915_gem_internal.c
+++ b/drivers/gpu/drm/i915/i915_gem_internal.c
@@ -49,7 +49,7 @@ static int i915_gem_object_get_pages_internal(struct drm_i915_gem_object *obj)
 	struct drm_i915_private *i915 = to_i915(obj->base.dev);
 	struct sg_table *st;
 	struct scatterlist *sg;
-	unsigned int sg_mask;
+	unsigned int sg_page_sizes;
 	unsigned int npages;
 	int max_order;
 	gfp_t gfp;
@@ -88,7 +88,7 @@ static int i915_gem_object_get_pages_internal(struct drm_i915_gem_object *obj)
 
 	sg = st->sgl;
 	st->nents = 0;
-	sg_mask = 0;
+	sg_page_sizes = 0;
 
 	do {
 		int order = min(fls(npages) - 1, max_order);
@@ -106,7 +106,7 @@ static int i915_gem_object_get_pages_internal(struct drm_i915_gem_object *obj)
 		} while (1);
 
 		sg_set_page(sg, page, PAGE_SIZE << order, 0);
-		sg_mask |= PAGE_SIZE << order;
+		sg_page_sizes |= PAGE_SIZE << order;
 		st->nents++;
 
 		npages -= 1 << order;
@@ -135,7 +135,7 @@ static int i915_gem_object_get_pages_internal(struct drm_i915_gem_object *obj)
 	 */
 	obj->mm.madv = I915_MADV_DONTNEED;
 
-	__i915_gem_object_set_pages(obj, st, sg_mask);
+	__i915_gem_object_set_pages(obj, st, sg_page_sizes);
 
 	return 0;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_userptr.c b/drivers/gpu/drm/i915/i915_gem_userptr.c
index 41e16e19c3f3..c36a84b070b6 100644
--- a/drivers/gpu/drm/i915/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/i915_gem_userptr.c
@@ -405,7 +405,7 @@ __i915_gem_userptr_alloc_pages(struct drm_i915_gem_object *obj,
 {
 	unsigned int max_segment = i915_sg_segment_size();
 	struct sg_table *st;
-	unsigned int sg_mask;
+	unsigned int sg_page_sizes;
 	int ret;
 
 	st = kmalloc(sizeof(*st), GFP_KERNEL);
@@ -435,9 +435,9 @@ __i915_gem_userptr_alloc_pages(struct drm_i915_gem_object *obj,
 		return ERR_PTR(ret);
 	}
 
-	sg_mask = i915_sg_page_sizes(st->sgl);
+	sg_page_sizes = i915_sg_page_sizes(st->sgl);
 
-	__i915_gem_object_set_pages(obj, st, sg_mask);
+	__i915_gem_object_set_pages(obj, st, sg_page_sizes);
 
 	return st;
 }
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
index b8495882e5b0..b8b9d0822199 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -68,7 +68,7 @@ static int get_huge_pages(struct drm_i915_gem_object *obj)
 	unsigned int page_mask = obj->mm.page_mask;
 	struct sg_table *st;
 	struct scatterlist *sg;
-	unsigned int sg_mask;
+	unsigned int sg_page_sizes;
 	u64 rem;
 
 	st = kmalloc(sizeof(*st), GFP);
@@ -83,7 +83,7 @@ static int get_huge_pages(struct drm_i915_gem_object *obj)
 	rem = obj->base.size;
 	sg = st->sgl;
 	st->nents = 0;
-	sg_mask = 0;
+	sg_page_sizes = 0;
 
 	/*
 	 * Our goal here is simple, we want to greedily fill the object from
@@ -104,7 +104,7 @@ static int get_huge_pages(struct drm_i915_gem_object *obj)
 				goto err;
 
 			sg_set_page(sg, page, page_size, 0);
-			sg_mask |= page_size;
+			sg_page_sizes |= page_size;
 			st->nents++;
 
 			rem -= page_size;
@@ -124,8 +124,8 @@ static int get_huge_pages(struct drm_i915_gem_object *obj)
 
 	obj->mm.madv = I915_MADV_DONTNEED;
 
-	GEM_BUG_ON(sg_mask != obj->mm.page_mask);
-	__i915_gem_object_set_pages(obj, st, sg_mask);
+	GEM_BUG_ON(sg_page_sizes != obj->mm.page_mask);
+	__i915_gem_object_set_pages(obj, st, sg_page_sizes);
 
 	return 0;
 
@@ -192,7 +192,7 @@ static int fake_get_huge_pages(struct drm_i915_gem_object *obj)
 	const u64 max_len = rounddown_pow_of_two(UINT_MAX);
 	struct sg_table *st;
 	struct scatterlist *sg;
-	unsigned int sg_mask;
+	unsigned int sg_page_sizes;
 	u64 rem;
 
 	st = kmalloc(sizeof(*st), GFP);
@@ -208,7 +208,7 @@ static int fake_get_huge_pages(struct drm_i915_gem_object *obj)
 	rem = obj->base.size;
 	sg = st->sgl;
 	st->nents = 0;
-	sg_mask = 0;
+	sg_page_sizes = 0;
 	do {
 		unsigned int page_size = get_largest_page_size(i915, rem);
 		unsigned int len = min(page_size * div_u64(rem, page_size),
@@ -221,7 +221,7 @@ static int fake_get_huge_pages(struct drm_i915_gem_object *obj)
 		sg_dma_len(sg) = len;
 		sg_dma_address(sg) = page_size;
 
-		sg_mask |= len;
+		sg_page_sizes |= len;
 
 		st->nents++;
 
@@ -236,7 +236,7 @@ static int fake_get_huge_pages(struct drm_i915_gem_object *obj)
 
 	obj->mm.madv = I915_MADV_DONTNEED;
 
-	__i915_gem_object_set_pages(obj, st, sg_mask);
+	__i915_gem_object_set_pages(obj, st, sg_page_sizes);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index 883bc19e3aaf..9da0c9f99916 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -45,7 +45,7 @@ static int fake_get_pages(struct drm_i915_gem_object *obj)
 #define PFN_BIAS 0x1000
 	struct sg_table *pages;
 	struct scatterlist *sg;
-	unsigned int sg_mask;
+	unsigned int sg_page_sizes;
 	typeof(obj->base.size) rem;
 
 	pages = kmalloc(sizeof(*pages), GFP);
@@ -58,7 +58,7 @@ static int fake_get_pages(struct drm_i915_gem_object *obj)
 		return -ENOMEM;
 	}
 
-	sg_mask = 0;
+	sg_page_sizes = 0;
 	rem = obj->base.size;
 	for (sg = pages->sgl; sg; sg = sg_next(sg)) {
 		unsigned long len = min_t(typeof(rem), rem, BIT(31));
@@ -67,7 +67,7 @@ static int fake_get_pages(struct drm_i915_gem_object *obj)
 		sg_set_page(sg, pfn_to_page(PFN_BIAS), len, 0);
 		sg_dma_address(sg) = page_to_phys(sg_page(sg));
 		sg_dma_len(sg) = len;
-		sg_mask |= len;
+		sg_page_sizes |= len;
 
 		rem -= len;
 	}
@@ -75,7 +75,7 @@ static int fake_get_pages(struct drm_i915_gem_object *obj)
 
 	obj->mm.madv = I915_MADV_DONTNEED;
 
-	__i915_gem_object_set_pages(obj, pages, sg_mask);
+	__i915_gem_object_set_pages(obj, pages, sg_page_sizes);
 
 	return 0;
 #undef GFP
-- 
2.13.6

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: s/sg_mask/sg_page_sizes/
  2017-10-09 11:00 [PATCH] drm/i915: s/sg_mask/sg_page_sizes/ Matthew Auld
@ 2017-10-09 11:34 ` Chris Wilson
  2017-10-09 12:40 ` ✓ Fi.CI.BAT: success for " Patchwork
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2017-10-09 11:34 UTC (permalink / raw)
  To: Matthew Auld, intel-gfx

Quoting Matthew Auld (2017-10-09 12:00:24)
> It's a little unclear what the sg_mask actually is, so prefer the more
> meaningful name of sg_page_sizes.
> 
> Suggested-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>

Indeed, reads much better,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: s/sg_mask/sg_page_sizes/
  2017-10-09 11:00 [PATCH] drm/i915: s/sg_mask/sg_page_sizes/ Matthew Auld
  2017-10-09 11:34 ` Chris Wilson
@ 2017-10-09 12:40 ` Patchwork
  2017-10-09 13:00 ` [PATCH] " Joonas Lahtinen
  2017-10-09 16:40 ` ✓ Fi.CI.IGT: success for " Patchwork
  3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2017-10-09 12:40 UTC (permalink / raw)
  To: Matthew Auld; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: s/sg_mask/sg_page_sizes/
URL   : https://patchwork.freedesktop.org/series/31585/
State : success

== Summary ==

Series 31585v1 drm/i915: s/sg_mask/sg_page_sizes/
https://patchwork.freedesktop.org/api/1.0/series/31585/revisions/1/mbox/

Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> DMESG-WARN (fi-byt-n2820) fdo#101705

fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:452s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:465s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:390s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:569s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:287s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:514s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:524s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:536s
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:513s
fi-cfl-s         total:289  pass:256  dwarn:1   dfail:0   fail:0   skip:32  time:560s
fi-cnl-y         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:614s
fi-elk-e7500     total:289  pass:229  dwarn:0   dfail:0   fail:0   skip:60  time:427s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:601s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:442s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:419s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:508s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:471s
fi-kbl-7500u     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:501s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:586s
fi-kbl-7567u     total:289  pass:265  dwarn:4   dfail:0   fail:0   skip:20  time:488s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:589s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:468s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:654s
fi-skl-6700k     total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:529s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:512s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:477s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:576s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:427s
fi-pnv-d510 failed to connect after reboot

242bbe72fc6dd609ca3ee75aedf3f0b7aa22c918 drm-tip: 2017y-10m-09d-11h-57m-05s UTC integration manifest
14625657c311 drm/i915: s/sg_mask/sg_page_sizes/

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5950/
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^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: s/sg_mask/sg_page_sizes/
  2017-10-09 11:00 [PATCH] drm/i915: s/sg_mask/sg_page_sizes/ Matthew Auld
  2017-10-09 11:34 ` Chris Wilson
  2017-10-09 12:40 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-10-09 13:00 ` Joonas Lahtinen
  2017-10-09 14:10   ` Chris Wilson
  2017-10-09 16:40 ` ✓ Fi.CI.IGT: success for " Patchwork
  3 siblings, 1 reply; 6+ messages in thread
From: Joonas Lahtinen @ 2017-10-09 13:00 UTC (permalink / raw)
  To: Matthew Auld, intel-gfx

On Mon, 2017-10-09 at 12:00 +0100, Matthew Auld wrote:
> It's a little unclear what the sg_mask actually is, so prefer the more
> meaningful name of sg_page_sizes.
> 
> Suggested-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>

<SNIP>

> @@ -2489,16 +2489,16 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
>  		obj->mm.quirked = true;
>  	}
>  
> -	GEM_BUG_ON(!sg_mask);
> -	obj->mm.page_sizes.phys = sg_mask;
> +	GEM_BUG_ON(!sg_page_sizes);
> +	obj->mm.page_sizes.phys = sg_page_sizes;
>  
>  	/*
> -	 * Calculate the supported page-sizes which fit into the given sg_mask.
> -	 * This will give us the page-sizes which we may be able to use
> -	 * opportunistically when later inserting into the GTT. For example if
> -	 * phys=2G, then in theory we should be able to use 1G, 2M, 64K or 4K
> -	 * pages, although in practice this will depend on a number of other
> -	 * factors.
> +	 * Calculate the supported page-sizes which fit into the given
> +	 * sg_page_sizes.  This will give us the page-sizes which we may be able

Double space before "This".

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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^ permalink raw reply	[flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: s/sg_mask/sg_page_sizes/
  2017-10-09 13:00 ` [PATCH] " Joonas Lahtinen
@ 2017-10-09 14:10   ` Chris Wilson
  0 siblings, 0 replies; 6+ messages in thread
From: Chris Wilson @ 2017-10-09 14:10 UTC (permalink / raw)
  To: Joonas Lahtinen, Matthew Auld, intel-gfx

Quoting Joonas Lahtinen (2017-10-09 14:00:56)
> On Mon, 2017-10-09 at 12:00 +0100, Matthew Auld wrote:
> > It's a little unclear what the sg_mask actually is, so prefer the more
> > meaningful name of sg_page_sizes.
> > 
> > Suggested-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> 
> <SNIP>
> 
> > @@ -2489,16 +2489,16 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
> >               obj->mm.quirked = true;
> >       }
> >  
> > -     GEM_BUG_ON(!sg_mask);
> > -     obj->mm.page_sizes.phys = sg_mask;
> > +     GEM_BUG_ON(!sg_page_sizes);
> > +     obj->mm.page_sizes.phys = sg_page_sizes;
> >  
> >       /*
> > -      * Calculate the supported page-sizes which fit into the given sg_mask.
> > -      * This will give us the page-sizes which we may be able to use
> > -      * opportunistically when later inserting into the GTT. For example if
> > -      * phys=2G, then in theory we should be able to use 1G, 2M, 64K or 4K
> > -      * pages, although in practice this will depend on a number of other
> > -      * factors.
> > +      * Calculate the supported page-sizes which fit into the given
> > +      * sg_page_sizes.  This will give us the page-sizes which we may be able
> 
> Double space before "This".

Long ago, it was argued as proper style to follow the period with a
double space.  Corrected since we don't adhere to that style. :)
 
> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Applied to my queue, thanks for the patch and review.
-Chris
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^ permalink raw reply	[flat|nested] 6+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: s/sg_mask/sg_page_sizes/
  2017-10-09 11:00 [PATCH] drm/i915: s/sg_mask/sg_page_sizes/ Matthew Auld
                   ` (2 preceding siblings ...)
  2017-10-09 13:00 ` [PATCH] " Joonas Lahtinen
@ 2017-10-09 16:40 ` Patchwork
  3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2017-10-09 16:40 UTC (permalink / raw)
  To: Matthew Auld; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: s/sg_mask/sg_page_sizes/
URL   : https://patchwork.freedesktop.org/series/31585/
State : success

== Summary ==

Test perf:
        Subgroup polling:
                fail       -> PASS       (shard-hsw) fdo#102252
Test kms_cursor_legacy:
        Subgroup cursorA-vs-flipA-varying-size:
                skip       -> PASS       (shard-hsw)

fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252

shard-hsw        total:2446 pass:1329 dwarn:6   dfail:0   fail:8   skip:1103 time:10105s

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5950/shards.html
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^ permalink raw reply	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-10-09 16:40 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-10-09 11:00 [PATCH] drm/i915: s/sg_mask/sg_page_sizes/ Matthew Auld
2017-10-09 11:34 ` Chris Wilson
2017-10-09 12:40 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-10-09 13:00 ` [PATCH] " Joonas Lahtinen
2017-10-09 14:10   ` Chris Wilson
2017-10-09 16:40 ` ✓ Fi.CI.IGT: success for " Patchwork

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