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* [PATCH v2] drm/i915: Debugfs to disable context banning
@ 2017-10-18  0:10 jeff.mcgee
  2017-10-18  0:39 ` ✗ Fi.CI.BAT: failure for drm/i915: Debugfs to disable context banning (rev2) Patchwork
  0 siblings, 1 reply; 2+ messages in thread
From: jeff.mcgee @ 2017-10-18  0:10 UTC (permalink / raw)
  To: intel-gfx

From: Jeff McGee <jeff.mcgee@intel.com>

Useful for stress testing various reset scenarios. The ioctl that we
have for specific client/context banning disable is difficult to utilize
outside of unit testing.

v2: Fix rebase compilation error

Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 27 ++++++++++++++++++++++++++-
 drivers/gpu/drm/i915/i915_drv.h     |  2 ++
 drivers/gpu/drm/i915/i915_gem.c     |  3 ++-
 3 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 0bb6e01121fc..af14f019926d 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -4408,6 +4408,30 @@ DEFINE_SIMPLE_ATTRIBUTE(i915_min_freq_fops,
 			i915_min_freq_get, i915_min_freq_set,
 			"%llu\n");
 
+static int i915_banning_disable_get(void *data, u64 *val)
+{
+	struct drm_device *dev = data;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+
+	*val = dev_priv->gpu_error.banning_disabled;
+
+	return 0;
+}
+
+static int i915_banning_disable_set(void *data, u64 val)
+{
+	struct drm_device *dev = data;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+
+	dev_priv->gpu_error.banning_disabled = (bool)val;
+
+	return 0;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(i915_banning_disable_fops,
+			i915_banning_disable_get, i915_banning_disable_set,
+			"%llu\n");
+
 static int
 i915_cache_sharing_get(void *data, u64 *val)
 {
@@ -4828,7 +4852,8 @@ static const struct i915_debugfs_files {
 	{"i915_dp_test_active", &i915_displayport_test_active_fops},
 	{"i915_guc_log_control", &i915_guc_log_control_fops},
 	{"i915_hpd_storm_ctl", &i915_hpd_storm_ctl_fops},
-	{"i915_ipc_status", &i915_ipc_status_fops}
+	{"i915_ipc_status", &i915_ipc_status_fops},
+	{"i915_banning_disable", &i915_banning_disable_fops},
 };
 
 int i915_debugfs_register(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c7b2ca6aff05..da65b6f8cc6f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1667,6 +1667,8 @@ struct i915_gpu_error {
 
 	/* For missed irq/seqno simulation. */
 	unsigned long test_irq_rings;
+
+	bool banning_disabled;
 };
 
 enum modeset_restore {
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 20fcac37c85a..e0cb53cafc66 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2770,7 +2770,8 @@ i915_gem_object_pwrite_gtt(struct drm_i915_gem_object *obj,
 static bool ban_context(const struct i915_gem_context *ctx,
 			unsigned int score)
 {
-	return (i915_gem_context_is_bannable(ctx) &&
+	return (!ctx->i915->gpu_error.banning_disabled &&
+		i915_gem_context_is_bannable(ctx) &&
 		score >= CONTEXT_SCORE_BAN_THRESHOLD);
 }
 
-- 
2.14.2

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