public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>,
	intel-gfx@lists.freedesktop.org,
	Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.
Date: Thu, 19 Oct 2017 19:02:25 +0300	[thread overview]
Message-ID: <20171019160225.GW10981@intel.com> (raw)
In-Reply-To: <20171019154521.13450-1-rodrigo.vivi@intel.com>

On Thu, Oct 19, 2017 at 08:45:21AM -0700, Rodrigo Vivi wrote:
> Starting on CNL we now need to map VBT DDC Pin to
> BSPec DDC Pin values. Not a direct translation anymore.
> 
> According to VBT
> Block 2 (General Bytes Definition)
> DDC Bus
> 
> +----------+-----------+--------------------+
> | DDI Type | VBT Value | Bspec Mapped Value |
> +----------+-----------+--------------------+
> | DDI-B    | 0x1       | 0x1                |
> | DDI-C    | 0x2       | 0x2                |
> | DDI-D    | 0x3       | 0x4                |
> | DDI-F    | 0x4       | 0x3                |
> +----------+-----------+--------------------+
> 
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Cc: Clinton Taylor <clinton.a.taylor@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_bios.c | 32 ++++++++++++++++++++++----------
>  1 file changed, 22 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index dc4fad30bf4f..e0e59cd52766 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -1071,6 +1071,24 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
>  	}
>  }
>  
> +#define DDC_BUS_DDI_B	0x1
> +#define DDC_BUS_DDI_C	0x2
> +#define DDC_BUS_DDI_D	0x3
> +#define DDC_BUS_DDI_F	0x4

enum perhaps?

> +
> +static u8 cnl_ddc_pin_map(u8 ddc_pin)
> +{
> +	switch (ddc_pin) {
> +	case DDC_BUS_DDI_B: return 0x1;
> +	case DDC_BUS_DDI_C: return 0x2;
> +	case DDC_BUS_DDI_D: return 0x4;
> +	case DDC_BUS_DDI_F: return 0x3;

s/magic number/GMBUS_PIN_whatever/ ?

Also looks like this thing could be represented as an array instead,
even for *future* platforms.

> +	default:
> +		MISSING_CASE(ddc_pin);
> +		return ddc_pin;
> +	}
> +}
> +
>  static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>  			   u8 bdb_version)
>  {
> @@ -1164,16 +1182,10 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
>  		DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
>  
>  	if (is_dvi) {
> -		info->alternate_ddc_pin = ddc_pin;
> -
> -		/*
> -		 * All VBTs that we got so far for B Stepping has this
> -		 * information wrong for Port D. So, let's just ignore for now.
> -		 */
> -		if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) &&
> -		    port == PORT_D) {
> -			info->alternate_ddc_pin = 0;
> -		}
> +		if (IS_CANNONLAKE(dev_priv))
> +			info->alternate_ddc_pin = cnl_ddc_pin_map(ddc_pin);
> +		else
> +			info->alternate_ddc_pin = ddc_pin;
>  
>  		sanitize_ddc_pin(dev_priv, port);
>  	}
> -- 
> 2.13.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2017-10-19 16:02 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-19 15:45 [PATCH] drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin Rodrigo Vivi
2017-10-19 16:02 ` Rodrigo Vivi
2017-10-19 16:02 ` Ville Syrjälä [this message]
2017-10-19 21:11   ` Rodrigo Vivi
2017-10-20  9:11     ` Jani Nikula
2017-10-20 11:25       ` Ville Syrjälä
2017-10-20 11:29         ` Jani Nikula
2017-10-20 17:26           ` Rodrigo Vivi
2017-10-20 17:40             ` Ville Syrjälä
2017-10-20 23:24               ` Rodrigo Vivi
2017-10-19 16:12 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-10-19 16:34 ` ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev2) Patchwork
2017-10-19 17:23 ` ✓ Fi.CI.IGT: " Patchwork
2017-10-19 21:32 ` ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev3) Patchwork
2017-10-19 22:29 ` ✓ Fi.CI.IGT: " Patchwork
2017-10-20 18:07 ` ✓ Fi.CI.BAT: success for drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin. (rev4) Patchwork
2017-10-20 20:04 ` ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20171019160225.GW10981@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@intel.com \
    --cc=paulo.r.zanoni@intel.com \
    --cc=rodrigo.vivi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox