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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 00/10] drm/i915: CNL DVFS thing
Date: Tue, 24 Oct 2017 13:01:05 +0300	[thread overview]
Message-ID: <20171024100105.GD10981@intel.com> (raw)
In-Reply-To: <20171024095216.1638-1-ville.syrjala@linux.intel.com>

On Tue, Oct 24, 2017 at 12:52:06PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> New version of the CNL DVFS series. Everything from the previous series
> (first 8 patches) are already reviewed. I slapped on two additional patches
> that fell out from the review of the first series.

Oh, and I forgot to mention that the other main change from the previous
series is that we now talk about "voltage_level" rather than "voltage"
everywhere. That required changes to almost all the patches, hence I
sent out a new full series.

> 
> Entire series available here:
> git://github.com/vsyrjala/linux.git dvfs_voltage_6
> 
> Ville Syrjälä (10):
>   drm/i915: Clean up some cdclk switch statements
>   drm/i915: Start tracking voltage level in the cdclk state
>   drm/i915: Use cdclk_state->voltage on VLV/CHV
>   drm/i915: Use cdclk_state->voltage on BDW
>   drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL
>   drm/i915: Use cdclk_state->voltage on BXT/GLK
>   drm/i915: Use cdclk_state->voltage on CNL
>   drm/i915: Adjust system agent voltage on CNL if required by DDI ports
>   drm/i915: Sanity check cdclk in vlv_set_cdclk()
>   drm/i915: Perform a central cdclk state sanity check
> 
>  drivers/gpu/drm/i915/i915_drv.h         |   3 +
>  drivers/gpu/drm/i915/intel_cdclk.c      | 377 ++++++++++++++++++++++++--------
>  drivers/gpu/drm/i915/intel_ddi.c        |  11 +
>  drivers/gpu/drm/i915/intel_display.c    |  22 +-
>  drivers/gpu/drm/i915/intel_dp_mst.c     |   5 +
>  drivers/gpu/drm/i915/intel_dpll_mgr.c   |  16 +-
>  drivers/gpu/drm/i915/intel_drv.h        |  13 +-
>  drivers/gpu/drm/i915/intel_runtime_pm.c |   3 +-
>  8 files changed, 342 insertions(+), 108 deletions(-)
> 
> -- 
> 2.13.6

-- 
Ville Syrjälä
Intel OTC
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  parent reply	other threads:[~2017-10-24 10:01 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-24  9:52 [PATCH v2 00/10] drm/i915: CNL DVFS thing Ville Syrjala
2017-10-24  9:52 ` [PATCH 01/10] drm/i915: Clean up some cdclk switch statements Ville Syrjala
2017-10-24  9:52 ` [PATCH v2 02/10] drm/i915: Start tracking voltage level in the cdclk state Ville Syrjala
2017-10-24  9:52 ` [PATCH v4 03/10] drm/i915: Use cdclk_state->voltage on VLV/CHV Ville Syrjala
2017-10-24  9:52 ` [PATCH v3 04/10] drm/i915: Use cdclk_state->voltage on BDW Ville Syrjala
2017-10-24  9:52 ` [PATCH v2 05/10] drm/i915: Use cdclk_state->voltage on SKL/KBL/CFL Ville Syrjala
2017-10-24  9:52 ` [PATCH v2 06/10] drm/i915: Use cdclk_state->voltage on BXT/GLK Ville Syrjala
2017-10-24  9:52 ` [PATCH v2 07/10] drm/i915: Use cdclk_state->voltage on CNL Ville Syrjala
2017-10-24  9:52 ` [PATCH v4 08/10] drm/i915: Adjust system agent voltage on CNL if required by DDI ports Ville Syrjala
2017-10-24  9:52 ` [PATCH 09/10] drm/i915: Sanity check cdclk in vlv_set_cdclk() Ville Syrjala
2017-10-24 17:47   ` Rodrigo Vivi
2017-10-24  9:52 ` [PATCH 10/10] drm/i915: Perform a central cdclk state sanity check Ville Syrjala
2017-10-24 21:51   ` Rodrigo Vivi
2017-10-24 10:01 ` Ville Syrjälä [this message]
2017-10-24 11:12 ` ✗ Fi.CI.BAT: failure for drm/i915: CNL DVFS thing (rev7) Patchwork
2017-10-24 13:23 ` Patchwork
2017-10-24 17:01 ` ✗ Fi.CI.BAT: warning " Patchwork
2017-10-24 18:30 ` ✗ Fi.CI.BAT: failure " Patchwork
2017-10-24 20:08 ` ✓ Fi.CI.BAT: success " Patchwork
2017-10-25  6:15   ` Saarinen, Jani
2017-10-24 21:29 ` ✓ Fi.CI.IGT: " Patchwork
2017-10-25 13:22 ` [PATCH v2 00/10] drm/i915: CNL DVFS thing Ville Syrjälä

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