From: Tvrtko Ursulin <tursulin@ursulin.net>
To: Intel-gfx@lists.freedesktop.org
Cc: gordon.kelly@intel.com
Subject: [RFC 12/17] drm/i915: Track per-context engine busyness
Date: Wed, 25 Oct 2017 16:36:27 +0100 [thread overview]
Message-ID: <20171025153632.557-13-tvrtko.ursulin@linux.intel.com> (raw)
In-Reply-To: <20171025153632.557-1-tvrtko.ursulin@linux.intel.com>
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Some customers want to know how much of the GPU time are their clients
using in order to make dynamic load balancing decisions.
With the hooks already in place which track the overall engine busyness,
we can extend that slightly to split that time between contexts.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: gordon.kelly@intel.com
---
drivers/gpu/drm/i915/i915_gem_context.h | 4 ++++
drivers/gpu/drm/i915/intel_lrc.c | 14 +++++++-----
drivers/gpu/drm/i915/intel_ringbuffer.h | 39 ++++++++++++++++++++++++++++-----
3 files changed, 46 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.h b/drivers/gpu/drm/i915/i915_gem_context.h
index 44688e22a5c2..15134329dbf0 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/i915_gem_context.h
@@ -158,6 +158,10 @@ struct i915_gem_context {
u64 lrc_desc;
int pin_count;
bool initialised;
+ struct {
+ ktime_t start;
+ ktime_t total;
+ } stats;
} engine[I915_NUM_ENGINES];
/** ring_size: size for allocating the per-engine ring buffer */
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index fcdd1c52f5ae..2f496894aa40 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -401,16 +401,19 @@ execlists_context_status_change(struct drm_i915_gem_request *rq,
}
static inline void
-execlists_context_schedule_in(struct drm_i915_gem_request *rq)
+execlists_context_schedule_in(struct drm_i915_gem_request *rq,
+ unsigned int port)
{
execlists_context_status_change(rq, INTEL_CONTEXT_SCHEDULE_IN);
- intel_engine_context_in(rq->engine);
+ intel_engine_context_in(rq->engine,
+ &rq->ctx->engine[rq->engine->id],
+ port == 0);
}
static inline void
execlists_context_schedule_out(struct drm_i915_gem_request *rq)
{
- intel_engine_context_out(rq->engine);
+ intel_engine_context_out(rq->engine, &rq->ctx->engine[rq->engine->id]);
execlists_context_status_change(rq, INTEL_CONTEXT_SCHEDULE_OUT);
}
@@ -465,7 +468,7 @@ static void execlists_submit_ports(struct intel_engine_cs *engine)
if (rq) {
GEM_BUG_ON(count > !n);
if (!count++)
- execlists_context_schedule_in(rq);
+ execlists_context_schedule_in(rq, n);
port_set(&port[n], port_pack(rq, count));
desc = execlists_update_context(rq);
GEM_DEBUG_EXEC(port[n].context_id = upper_32_bits(desc));
@@ -714,7 +717,8 @@ execlist_cancel_port_requests(struct intel_engine_execlists *execlists)
struct drm_i915_gem_request *rq = port_request(port);
GEM_BUG_ON(!execlists->active);
- intel_engine_context_out(rq->engine);
+ intel_engine_context_out(rq->engine,
+ &rq->ctx->engine[rq->engine->id]);
execlists_context_status_change(rq, INTEL_CONTEXT_SCHEDULE_PREEMPTED);
i915_gem_request_put(rq);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 3b1dbcbb9d1f..25dd238d5d00 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -3,6 +3,7 @@
#include <linux/hashtable.h>
#include "i915_gem_batch_pool.h"
+#include "i915_gem_context.h"
#include "i915_gem_request.h"
#include "i915_gem_timeline.h"
#include "i915_pmu.h"
@@ -953,25 +954,37 @@ void intel_engine_dump(struct intel_engine_cs *engine, struct drm_printer *p);
struct intel_engine_cs *
intel_engine_lookup_user(struct drm_i915_private *i915, u8 class, u8 instance);
-static inline void intel_engine_context_in(struct intel_engine_cs *engine)
+static inline void
+intel_engine_context_in(struct intel_engine_cs *engine,
+ struct intel_context *ce,
+ bool submit)
{
unsigned long flags;
+ ktime_t now;
if (READ_ONCE(engine->stats.enabled) == 0)
return;
spin_lock_irqsave(&engine->stats.lock, flags);
+ now = submit ? ktime_get() : 0;
+ ce->stats.start = now;
+
if (engine->stats.enabled > 0) {
- if (engine->stats.active++ == 0)
- engine->stats.start = ktime_get();
+ if (engine->stats.active++ == 0) {
+ if (!now)
+ now = ktime_get();
+ engine->stats.start = now;
+ }
GEM_BUG_ON(engine->stats.active == 0);
}
spin_unlock_irqrestore(&engine->stats.lock, flags);
}
-static inline void intel_engine_context_out(struct intel_engine_cs *engine)
+static inline void
+intel_engine_context_out(struct intel_engine_cs *engine,
+ struct intel_context *ce)
{
unsigned long flags;
@@ -981,14 +994,28 @@ static inline void intel_engine_context_out(struct intel_engine_cs *engine)
spin_lock_irqsave(&engine->stats.lock, flags);
if (engine->stats.enabled > 0) {
+ struct execlist_port *next_port = &engine->execlists.port[1];
+ ktime_t now = ktime_get();
ktime_t last;
+ GEM_BUG_ON(!ce->stats.start);
+ ce->stats.total = ktime_add(ce->stats.total,
+ ktime_sub(now, ce->stats.start));
+ if (port_isset(next_port)) {
+ struct drm_i915_gem_request *next_req =
+ port_request(next_port);
+ struct intel_context *next_ce =
+ &next_req->ctx->engine[engine->id];
+
+ next_ce->stats.start = now;
+ }
+
if (engine->stats.active && --engine->stats.active == 0) {
/*
* Decrement the active context count and in case GPU
* is now idle add up to the running total.
*/
- last = ktime_sub(ktime_get(), engine->stats.start);
+ last = ktime_sub(now, engine->stats.start);
engine->stats.total = ktime_add(engine->stats.total,
last);
@@ -998,7 +1025,7 @@ static inline void intel_engine_context_out(struct intel_engine_cs *engine)
* the first event in which case we account from the
* time stats gathering was turned on.
*/
- last = ktime_sub(ktime_get(), engine->stats.enabled_at);
+ last = ktime_sub(now, engine->stats.enabled_at);
engine->stats.total = ktime_add(engine->stats.total,
last);
--
2.9.5
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next prev parent reply other threads:[~2017-10-25 15:36 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-25 15:36 [RFC 00/17] Per-context and per-client engine busyness Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 01/17] drm/i915: Extract intel_get_cagf Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 02/17] drm/i915/pmu: Expose a PMU interface for perf queries Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 03/17] drm/i915/pmu: Suspend sampling when GPU is idle Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 04/17] drm/i915: Wrap context schedule notification Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 05/17] drm/i915: Engine busy time tracking Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 06/17] drm/i915/pmu: Wire up engine busy stats to PMU Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 07/17] drm/i915/pmu: Add interrupt count metric Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 08/17] drm/i915: Convert intel_rc6_residency_us to ns Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 09/17] drm/i915/pmu: Add RC6 residency metrics Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 10/17] drm/i915: Keep a count of requests waiting for a slot on GPU Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 11/17] drm/i915/pmu: Add queued counter Tvrtko Ursulin
2017-10-25 15:36 ` Tvrtko Ursulin [this message]
2017-10-25 15:36 ` [RFC 13/17] drm/i915: Allow clients to query own per-engine busyness Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 14/17] drm/i915: Expose list of clients in sysfs Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 15/17] drm/i915: Update client name on context create Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 16/17] drm/i915: Expose per-engine client busyness Tvrtko Ursulin
2017-10-25 15:36 ` [RFC 17/17] drm/i915: Add sysfs toggle to enable per-client engine stats Tvrtko Ursulin
2017-10-25 15:47 ` [RFC 00/17] Per-context and per-client engine busyness Chris Wilson
2017-10-25 17:38 ` Chris Wilson
2017-10-26 7:34 ` Tvrtko Ursulin
2017-10-26 7:51 ` Chris Wilson
2017-10-26 9:50 ` Lionel Landwerlin
2017-10-26 10:10 ` Chris Wilson
2017-10-26 13:00 ` Tvrtko Ursulin
2017-10-26 13:05 ` Chris Wilson
2017-10-26 17:13 ` Lionel Landwerlin
2017-10-26 20:11 ` Chris Wilson
2017-10-27 0:12 ` Lionel Landwerlin
2017-10-25 17:06 ` ✗ Fi.CI.BAT: failure for " Patchwork
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