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From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: [PATCH 2/2] drm/i915/edp: clean up code and comments around eDP DPCD read
Date: Thu, 26 Oct 2017 17:29:32 +0300	[thread overview]
Message-ID: <20171026142932.17737-2-jani.nikula@intel.com> (raw)
In-Reply-To: <20171026142932.17737-1-jani.nikula@intel.com>

Some minor drive-by cleanups.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 158438bb0389..73b1ed8cff6b 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3747,11 +3747,11 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
 	if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV,
 			     intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd)) ==
 			     sizeof(intel_dp->edp_dpcd))
-		DRM_DEBUG_KMS("EDP DPCD : %*ph\n", (int) sizeof(intel_dp->edp_dpcd),
+		DRM_DEBUG_KMS("eDP DPCD: %*ph\n", (int) sizeof(intel_dp->edp_dpcd),
 			      intel_dp->edp_dpcd);
 
-	/* Intermediate frequency support */
-	if (intel_dp->edp_dpcd[0] >= 0x03) { /* eDp v1.4 or higher */
+	/* Read the eDP 1.4+ supported link rates. */
+	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {
 		__le16 sink_rates[DP_MAX_SUPPORTED_RATES];
 		int i;
 
@@ -3775,6 +3775,10 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
 		intel_dp->num_sink_rates = i;
 	}
 
+	/*
+	 * Use DP_LINK_RATE_SET if DP_SUPPORTED_LINK_RATES are available,
+	 * default to DP_MAX_LINK_RATE and DP_LINK_BW_SET otherwise.
+	 */
 	if (intel_dp->num_sink_rates)
 		intel_dp->use_rate_select = true;
 	else
-- 
2.11.0

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  reply	other threads:[~2017-10-26 14:28 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-26 14:29 [PATCH 1/2] drm/i915/edp: read edp display control registers unconditionally Jani Nikula
2017-10-26 14:29 ` Jani Nikula [this message]
2017-10-26 19:34   ` [PATCH 2/2] drm/i915/edp: clean up code and comments around eDP DPCD read Manasi Navare
2017-10-26 14:55 ` [PATCH 1/2] drm/i915/edp: read edp display control registers unconditionally Ville Syrjälä
2017-10-26 15:02 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2017-10-26 19:40 ` [PATCH 1/2] " Manasi Navare
2017-10-30  9:55   ` Jani Nikula
2017-10-27 11:02 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2017-10-27 11:14 ` ✗ Fi.CI.BAT: failure " Patchwork
2017-10-30 15:31   ` Jani Nikula

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