Re: [PATCH v2 4/6] drm/i915: Handle ips_enabled in fastset

From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 4/6] drm/i915: Handle ips_enabled in fastset
Date: Thu, 9 Nov 2017 19:17:43 +0200	[thread overview]
Message-ID: <20171109171743.GX10981@intel.com> (raw)
In-Reply-To: <20171109162458.50681-4-maarten.lankhorst@linux.intel.com>

On Thu, Nov 09, 2017 at 05:24:56PM +0100, Maarten Lankhorst wrote:
> pre_plane_disable and post_plane_enable handle set ips correctly,
> but if there is no modeset and the ips_enabled value changes
> because of force disabling for crc, or hw state readout, then we
> don't toggle ips correctly. Handle this special case, which prevents
> us from having to do a full modeset when collecting pipe crc.
> 
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c  | 8 ++++++++
>  drivers/gpu/drm/i915/intel_pipe_crc.c | 2 +-
>  2 files changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 13b372e4f06e..3af1e3f74dbb 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5037,6 +5037,10 @@ static void intel_post_plane_update(struct intel_crtc_state *old_crtc_state)
>  		    (needs_modeset(&pipe_config->base) ||
>  		     !old_primary_state->base.visible))
>  			intel_post_enable_primary(&crtc->base, pipe_config);
> +		else if (pipe_config->update_pipe && pipe_config->ips_enabled &&

What's with the update_pipe check here? Shouldn't we just check

if (ips off -> ips on)
	enable_ips()

?

> +			 old_primary_state->base.visible && primary_state->base.visible)
> +			/* IPS turned on after fastset or CRC collection disable. */
> +			hsw_enable_ips(crtc, pipe_config);
>  	}
>  }
>  
> @@ -5066,6 +5070,10 @@ static void intel_pre_plane_update(struct intel_crtc_state *old_crtc_state,
>  		if (old_primary_state->base.visible &&
>  		    (modeset || !primary_state->base.visible))
>  			intel_pre_disable_primary(&crtc->base, old_crtc_state);
> +		else if (pipe_config->update_pipe && !pipe_config->ips_enabled &&
> +			 old_primary_state->base.visible && primary_state->base.visible)
> +			/* IPS turned off for CRC, disable it. */
> +			hsw_disable_ips(crtc, old_crtc_state);

same here.

>  	}
>  
>  	/*
> diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c
> index 899839f2f7c6..cb92befc16d7 100644
> --- a/drivers/gpu/drm/i915/intel_pipe_crc.c
> +++ b/drivers/gpu/drm/i915/intel_pipe_crc.c
> @@ -542,7 +542,7 @@ static void hsw_pipe_A_crc_wa(struct drm_i915_private *dev_priv,
>  		 */
>  		pipe_config->ips_force_disable = enable;
>  		if (pipe_config->ips_enabled == enable)
> -			pipe_config->base.connectors_changed = true;
> +			pipe_config->base.mode_changed = true;
>  	}
>  
>  	if (IS_HASWELL(dev_priv)) {
> -- 
> 2.15.0
> 
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-- 
Ville Syrjälä
Intel OTC
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