Re: [PATCH v2 5/6] drm/i915: Enable FIFO underrun reporting after initial fastset, v2.

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Fri, Nov 10, 2017 at 09:02:18AM +0100, Maarten Lankhorst wrote:
> Op 09-11-17 om 18:15 schreef Ville Syrjälä:
> > On Thu, Nov 09, 2017 at 05:24:57PM +0100, Maarten Lankhorst wrote:
> >> The firmware may have set up the pipe correctly, but the FIFO
> >> underrun and CRC interrupts are likely not enabled.
> >>
> >> This resulted in debugfs_test.read_all_entries failing on haswell,
> >> because of a timeout when reading the crc debugfs entry.
> >>
> >> Solve this by enabling FIFO underrun reporting after the initial
> >> fastset, which lets interrupts be generated as expected.
> >>
> >> Changes since v1:
> >> - Always enable CPU FIFO underrun reporting for >GEN2,
> >>   and handle GEN2 correctly.
> > "Correct" is a strong word to use here. I think I should have the
> > actually correct thing somewhere...
> >
> > git://github.com/vsyrjala/linux.git gen2_fifo_underrun
> >
> > Though it seems I haven't managed to write proper commit messages for
> > it yet.
> >
> >> Testcase: debugfs_test.read_all_entries
> >> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/intel_display.c | 12 ++++++++++++
> >>  1 file changed, 12 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> >> index 3af1e3f74dbb..58bce253f4a8 100644
> >> --- a/drivers/gpu/drm/i915/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/intel_display.c
> >> @@ -12905,6 +12905,7 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc,
> >>  static void intel_finish_crtc_commit(struct drm_crtc *crtc,
> >>  				     struct drm_crtc_state *old_crtc_state)
> >>  {
> >> +	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> >>  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> >>  	struct intel_atomic_state *old_intel_state =
> >>  		to_intel_atomic_state(old_crtc_state->state);
> >> @@ -12912,6 +12913,17 @@ static void intel_finish_crtc_commit(struct drm_crtc *crtc,
> >>  		intel_atomic_get_new_crtc_state(old_intel_state, intel_crtc);
> >>  
> >>  	intel_pipe_update_end(new_crtc_state);
> >> +
> >> +	if (new_crtc_state->update_pipe &&
> >> +	    !needs_modeset(&new_crtc_state->base) &&
> >> +	    old_crtc_state->mode.private_flags & I915_MODE_FLAG_INHERITED) {
> >> +		if (!IS_GEN2(dev_priv) ||
> >> +		    new_crtc_state->active_planes & BIT(PLANE_PRIMARY))
> >> +			intel_set_cpu_fifo_underrun_reporting(dev_priv, intel_crtc->pipe, true);
> >> +
> >> +		if (new_crtc_state->has_pch_encoder && !HAS_DDI(dev_priv))
> >> +			intel_set_pch_fifo_underrun_reporting(dev_priv, intel_crtc->pipe, true);
> > I quite dislike having so many platform checks in high level
> > common code. Maybe we should have some kind of
> > intel_initial_modeset_done() thing or something?
> 
> We have nothing better atm, I'm ok with completely ignoring FIFO underruns
> when inheriting on GEN2 as well, would that work for you for now?
> 
> > I don't quite see why that !DDI check is here either.
> 
> Oh that one can be nuked I think, was under the mistaken impression it could be set
> with DDI, but didn't see anywhere in the code the pch fifo underruns were set for DDI.
> 
> The has_pch_encoder check should be enough on its own after more careful inspection. :-)

Actually the crtc->pipe you pass in will be a problem. You'd have to use
intel_crtc_pch_transcoder(), or maybe we should just stop playing tricks
and store the pch transcoder in the crtc state?

-- 
Ville Syrjälä
Intel OTC
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