public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 10/11] drm/i915: Enable FIFO underrun reporting after initial fastset, v3.
Date: Mon, 13 Nov 2017 15:19:47 +0200	[thread overview]
Message-ID: <20171113131947.GM10981@intel.com> (raw)
In-Reply-To: <9ca60beb-4f63-f763-9821-5daf69c36f60@linux.intel.com>

On Mon, Nov 13, 2017 at 01:01:39PM +0100, Maarten Lankhorst wrote:
> Op 10-11-17 om 20:48 schreef Ville Syrjälä:
> > On Fri, Nov 10, 2017 at 12:35:02PM +0100, Maarten Lankhorst wrote:
> >> The firmware may have set up the pipe correctly, but the FIFO
> >> underrun and CRC interrupts are likely not enabled.
> >>
> >> This resulted in debugfs_test.read_all_entries failing on haswell,
> >> because of a timeout when reading the crc debugfs entry.
> >>
> >> Solve this by enabling FIFO underrun reporting after the initial
> >> fastset, which lets interrupts be generated as expected.
> >>
> >> Changes since v1:
> >> - Always enable CPU FIFO underrun reporting for >GEN2,
> >>   and handle GEN2 correctly.
> >> Changes since v2:
> >> - Remove unneeded HAS_DDI, simplify GEN2 case.
> >>
> >> Testcase: debugfs_test.read_all_entries
> >> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> >> ---
> >>  drivers/gpu/drm/i915/intel_display.c | 11 +++++++++++
> >>  1 file changed, 11 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> >> index 1b75af773ef7..f0dc33fb3390 100644
> >> --- a/drivers/gpu/drm/i915/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/intel_display.c
> >> @@ -12906,6 +12906,7 @@ static void intel_begin_crtc_commit(struct drm_crtc *crtc,
> >>  static void intel_finish_crtc_commit(struct drm_crtc *crtc,
> >>  				     struct drm_crtc_state *old_crtc_state)
> >>  {
> >> +	struct drm_i915_private *dev_priv = to_i915(crtc->dev);
> >>  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> >>  	struct intel_atomic_state *old_intel_state =
> >>  		to_intel_atomic_state(old_crtc_state->state);
> >> @@ -12913,6 +12914,16 @@ static void intel_finish_crtc_commit(struct drm_crtc *crtc,
> >>  		intel_atomic_get_new_crtc_state(old_intel_state, intel_crtc);
> >>  
> >>  	intel_pipe_update_end(new_crtc_state);
> >> +
> >> +	if (new_crtc_state->update_pipe &&
> >> +	    !needs_modeset(&new_crtc_state->base) &&
> >> +	    old_crtc_state->mode.private_flags & I915_MODE_FLAG_INHERITED) {
> >> +		if (!IS_GEN2(dev_priv))
> >> +			intel_set_cpu_fifo_underrun_reporting(dev_priv, intel_crtc->pipe, true);
> >> +
> >> +		if (new_crtc_state->has_pch_encoder)
> >> +			intel_set_pch_fifo_underrun_reporting(dev_priv, intel_crtc->pipe, true);
> > Still using the wrong transcoder for HSW/BDW.
> Would it be better with a call to intel_crtc_pch_transcoder?

That should do it (+ probably want to remove the crtc->config usage from
therein).

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2017-11-13 13:19 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-10 11:34 [PATCH v3 01/11] drm/i915: Update watermark state correctly in sanitize_watermarks Maarten Lankhorst
2017-11-10 11:34 ` [PATCH v3 02/11] drm/i915: Remove bogus ips_enabled check Maarten Lankhorst
2017-11-10 12:57   ` Daniel Vetter
2017-11-13 17:19     ` Ville Syrjälä
2017-11-10 11:34 ` [PATCH v3 03/11] drm/i915: Check boolean options in intel_pipe_config_compare with its own macro Maarten Lankhorst
2017-11-10 12:58   ` Daniel Vetter
2017-11-10 11:34 ` [PATCH v3 04/11] drm/i915: Handle adjust better in intel_pipe_config_compare Maarten Lankhorst
2017-11-10 13:02   ` Daniel Vetter
2017-11-13 17:24     ` Ville Syrjälä
2017-11-20 10:38       ` Daniel Vetter
2017-11-20 10:53         ` Ville Syrjälä
2017-11-20 12:54           ` Daniel Vetter
2017-11-10 11:34 ` [PATCH v3 05/11] drm/i915: Only enable IPS when primary plane is visible Maarten Lankhorst
2017-11-10 13:05   ` Daniel Vetter
2017-11-10 11:34 ` [PATCH v3 06/11] drm/i915: Handle locking better in i915_sink_crc Maarten Lankhorst
2017-11-10 13:13   ` Daniel Vetter
2017-11-10 13:24     ` Daniel Vetter
2017-11-13 12:05       ` Maarten Lankhorst
2017-11-10 11:34 ` [PATCH v3 07/11] drm/i915: Pass idle crtc_state to intel_dp_sink_crc Maarten Lankhorst
2017-11-13 17:17   ` Ville Syrjälä
2017-11-10 11:35 ` [PATCH v3 08/11] drm/i915: Pass crtc_state to ips toggle functions, v2 Maarten Lankhorst
2017-11-13 17:18   ` Ville Syrjälä
2017-11-17 11:21     ` Maarten Lankhorst
2017-11-10 11:35 ` [PATCH v3 09/11] drm/i915: Handle ips_enabled in fastset, v2 Maarten Lankhorst
2017-11-10 13:15   ` Daniel Vetter
2017-11-10 20:06     ` Ville Syrjälä
2017-11-10 11:35 ` [PATCH v3 10/11] drm/i915: Enable FIFO underrun reporting after initial fastset, v3 Maarten Lankhorst
2017-11-10 13:58   ` Daniel Vetter
2017-11-10 19:48   ` Ville Syrjälä
2017-11-13 12:01     ` Maarten Lankhorst
2017-11-13 13:19       ` Ville Syrjälä [this message]
2017-11-13 14:40     ` [PATCH] drm/i915: Enable FIFO underrun reporting after initial fastset, v4 Maarten Lankhorst
2017-11-13 14:49       ` Ville Syrjälä
2017-11-10 11:35 ` [PATCH v3 11/11] drm/i915: Re-enable fastboot by default Maarten Lankhorst
2017-11-10 12:30 ` ✓ Fi.CI.BAT: success for series starting with [v3,01/11] drm/i915: Update watermark state correctly in sanitize_watermarks Patchwork
2017-11-10 13:48 ` ✓ Fi.CI.IGT: " Patchwork
2017-11-10 15:28 ` [Intel-gfx] [PATCH v3 01/11] " Ville Syrjälä
2017-11-11 14:14   ` Maarten Lankhorst
2017-11-13 14:52 ` ✗ Fi.CI.BAT: failure for series starting with [v3,01/11] drm/i915: Update watermark state correctly in sanitize_watermarks (rev2) Patchwork
2017-11-13 15:21 ` Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20171113131947.GM10981@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=maarten.lankhorst@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox