From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 07/11] drm/i915: Pass idle crtc_state to intel_dp_sink_crc
Date: Mon, 13 Nov 2017 19:17:39 +0200 [thread overview]
Message-ID: <20171113171739.GR10981@intel.com> (raw)
In-Reply-To: <20171110113503.16253-7-maarten.lankhorst@linux.intel.com>
On Fri, Nov 10, 2017 at 12:34:59PM +0100, Maarten Lankhorst wrote:
> IPS can only be enabled if the primary plane is visible, so
> first make sure sw state matches hw state by waiting for hw_done.
>
> After this pass crtc_state to intel_dp_sink_crc() so that can be used,
> instead of using legacy pointers.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 17 +++++++++++++++--
> drivers/gpu/drm/i915/intel_dp.c | 23 +++++++++++++----------
> drivers/gpu/drm/i915/intel_drv.h | 3 ++-
> 3 files changed, 30 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 7e8f40eb970d..31db026494e0 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2747,6 +2747,7 @@ static int i915_sink_crc(struct seq_file *m, void *data)
> for_each_intel_connector_iter(connector, &conn_iter) {
> struct drm_crtc *crtc;
> struct drm_connector_state *state;
> + struct intel_crtc_state *crtc_state;
>
> if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> continue;
> @@ -2765,12 +2766,24 @@ static int i915_sink_crc(struct seq_file *m, void *data)
> if (ret)
> goto err;
>
> - if (!crtc->state->active)
> + crtc_state = to_intel_crtc_state(crtc->state);
We're under modeset_lock_all() so we can do this safely.
> + if (!crtc_state->base.active)
> continue;
>
> + /*
> + * We need to wait for all crtc updates to complete, to make
> + * sure any pending modesets and plane updates are completed.
> + */
> + if (crtc_state->base.commit) {
> + ret = wait_for_completion_interruptible(&crtc_state->base.commit->hw_done);
I guess it would be nice if we could actually keep grabbing crcs across
a longer period instead of just one frame. But we can't do that with the
current uapi for thos. Given that constraint this seems like the right
solution.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> +
> + if (ret)
> + goto err;
> + }
> +
> intel_dp = enc_to_intel_dp(state->best_encoder);
>
> - ret = intel_dp_sink_crc(intel_dp, crc);
> + ret = intel_dp_sink_crc(intel_dp, crtc_state, crc);
> if (ret)
> goto err;
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index cddd96b24878..abef0392abb9 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3907,11 +3907,12 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
> intel_dp->is_mst);
> }
>
> -static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp)
> +static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp,
> + struct intel_crtc_state *crtc_state, bool disable_wa)
> {
> struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> - struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
> + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
> u8 buf;
> int ret = 0;
> int count = 0;
> @@ -3947,15 +3948,17 @@ static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp)
> }
>
> out:
> - hsw_enable_ips(intel_crtc);
> + if (disable_wa)
> + hsw_enable_ips(intel_crtc);
> return ret;
> }
>
> -static int intel_dp_sink_crc_start(struct intel_dp *intel_dp)
> +static int intel_dp_sink_crc_start(struct intel_dp *intel_dp,
> + struct intel_crtc_state *crtc_state)
> {
> struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> - struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
> + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
> u8 buf;
> int ret;
>
> @@ -3969,7 +3972,7 @@ static int intel_dp_sink_crc_start(struct intel_dp *intel_dp)
> return -EIO;
>
> if (buf & DP_TEST_SINK_START) {
> - ret = intel_dp_sink_crc_stop(intel_dp);
> + ret = intel_dp_sink_crc_stop(intel_dp, crtc_state, false);
> if (ret)
> return ret;
> }
> @@ -3986,16 +3989,16 @@ static int intel_dp_sink_crc_start(struct intel_dp *intel_dp)
> return 0;
> }
>
> -int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
> +int intel_dp_sink_crc(struct intel_dp *intel_dp, struct intel_crtc_state *crtc_state, u8 *crc)
> {
> struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
> - struct intel_crtc *intel_crtc = to_intel_crtc(dig_port->base.base.crtc);
> + struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
> u8 buf;
> int count, ret;
> int attempts = 6;
>
> - ret = intel_dp_sink_crc_start(intel_dp);
> + ret = intel_dp_sink_crc_start(intel_dp, crtc_state);
> if (ret)
> return ret;
>
> @@ -4023,7 +4026,7 @@ int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc)
> }
>
> stop:
> - intel_dp_sink_crc_stop(intel_dp);
> + intel_dp_sink_crc_stop(intel_dp, crtc_state, true);
> return ret;
> }
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 00b488688042..6abe52161437 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1534,7 +1534,8 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
> void intel_dp_encoder_reset(struct drm_encoder *encoder);
> void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
> void intel_dp_encoder_destroy(struct drm_encoder *encoder);
> -int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc);
> +int intel_dp_sink_crc(struct intel_dp *intel_dp,
> + struct intel_crtc_state *crtc_state, u8 *crc);
> bool intel_dp_compute_config(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state);
> --
> 2.15.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2017-11-13 17:17 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-10 11:34 [PATCH v3 01/11] drm/i915: Update watermark state correctly in sanitize_watermarks Maarten Lankhorst
2017-11-10 11:34 ` [PATCH v3 02/11] drm/i915: Remove bogus ips_enabled check Maarten Lankhorst
2017-11-10 12:57 ` Daniel Vetter
2017-11-13 17:19 ` Ville Syrjälä
2017-11-10 11:34 ` [PATCH v3 03/11] drm/i915: Check boolean options in intel_pipe_config_compare with its own macro Maarten Lankhorst
2017-11-10 12:58 ` Daniel Vetter
2017-11-10 11:34 ` [PATCH v3 04/11] drm/i915: Handle adjust better in intel_pipe_config_compare Maarten Lankhorst
2017-11-10 13:02 ` Daniel Vetter
2017-11-13 17:24 ` Ville Syrjälä
2017-11-20 10:38 ` Daniel Vetter
2017-11-20 10:53 ` Ville Syrjälä
2017-11-20 12:54 ` Daniel Vetter
2017-11-10 11:34 ` [PATCH v3 05/11] drm/i915: Only enable IPS when primary plane is visible Maarten Lankhorst
2017-11-10 13:05 ` Daniel Vetter
2017-11-10 11:34 ` [PATCH v3 06/11] drm/i915: Handle locking better in i915_sink_crc Maarten Lankhorst
2017-11-10 13:13 ` Daniel Vetter
2017-11-10 13:24 ` Daniel Vetter
2017-11-13 12:05 ` Maarten Lankhorst
2017-11-10 11:34 ` [PATCH v3 07/11] drm/i915: Pass idle crtc_state to intel_dp_sink_crc Maarten Lankhorst
2017-11-13 17:17 ` Ville Syrjälä [this message]
2017-11-10 11:35 ` [PATCH v3 08/11] drm/i915: Pass crtc_state to ips toggle functions, v2 Maarten Lankhorst
2017-11-13 17:18 ` Ville Syrjälä
2017-11-17 11:21 ` Maarten Lankhorst
2017-11-10 11:35 ` [PATCH v3 09/11] drm/i915: Handle ips_enabled in fastset, v2 Maarten Lankhorst
2017-11-10 13:15 ` Daniel Vetter
2017-11-10 20:06 ` Ville Syrjälä
2017-11-10 11:35 ` [PATCH v3 10/11] drm/i915: Enable FIFO underrun reporting after initial fastset, v3 Maarten Lankhorst
2017-11-10 13:58 ` Daniel Vetter
2017-11-10 19:48 ` Ville Syrjälä
2017-11-13 12:01 ` Maarten Lankhorst
2017-11-13 13:19 ` Ville Syrjälä
2017-11-13 14:40 ` [PATCH] drm/i915: Enable FIFO underrun reporting after initial fastset, v4 Maarten Lankhorst
2017-11-13 14:49 ` Ville Syrjälä
2017-11-10 11:35 ` [PATCH v3 11/11] drm/i915: Re-enable fastboot by default Maarten Lankhorst
2017-11-10 12:30 ` ✓ Fi.CI.BAT: success for series starting with [v3,01/11] drm/i915: Update watermark state correctly in sanitize_watermarks Patchwork
2017-11-10 13:48 ` ✓ Fi.CI.IGT: " Patchwork
2017-11-10 15:28 ` [Intel-gfx] [PATCH v3 01/11] " Ville Syrjälä
2017-11-11 14:14 ` Maarten Lankhorst
2017-11-13 14:52 ` ✗ Fi.CI.BAT: failure for series starting with [v3,01/11] drm/i915: Update watermark state correctly in sanitize_watermarks (rev2) Patchwork
2017-11-13 15:21 ` Patchwork
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