From: Tvrtko Ursulin <tursulin@ursulin.net>
To: Intel-gfx@lists.freedesktop.org
Subject: [PATCH v4 3/4] drm/i915: Consolidate checks for engine stats availability
Date: Tue, 28 Nov 2017 13:04:21 +0000 [thread overview]
Message-ID: <20171128130421.4827-1-tvrtko.ursulin@linux.intel.com> (raw)
In-Reply-To: <151187399227.22640.8125964627929393921@mail.alporthouse.com>
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Sagar noticed the check can be consolidated between the engine stats
implementation and the PMU.
My first choice was a static inline helper but that got into include
ordering mess quickly fast so I went with a macro instead. At some point
we should perhaps looking into taking out the non-ringubffer bits from
intel_ringbuffer.h into a new intel_engine.h or something.
v2: Use engine->flags. (Chris Wilson)
v3: Rebase and mark GuC as not yet supported. (Chris Wilson)
v4: Move flag setting to intel_engines_reset_default_submission.
(Chris Wilson)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (v2)
---
drivers/gpu/drm/i915/i915_pmu.c | 11 ++++-------
drivers/gpu/drm/i915/intel_engine_cs.c | 8 +++++---
drivers/gpu/drm/i915/intel_guc_submission.c | 2 ++
drivers/gpu/drm/i915/intel_lrc.c | 2 ++
drivers/gpu/drm/i915/intel_ringbuffer.h | 6 ++++++
5 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 3357b690ce90..c3c641ec962b 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -90,11 +90,6 @@ static unsigned int event_enabled_bit(struct perf_event *event)
return config_enabled_bit(event->attr.config);
}
-static bool supports_busy_stats(struct drm_i915_private *i915)
-{
- return INTEL_GEN(i915) >= 8;
-}
-
static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
{
u64 enable;
@@ -123,8 +118,10 @@ static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
/*
* Also there is software busyness tracking available we do not
* need the timer for I915_SAMPLE_BUSY counter.
+ *
+ * Use RCS as proxy for all engines.
*/
- else if (supports_busy_stats(i915))
+ else if (intel_engine_supports_stats(i915->engine[RCS]))
enable &= ~BIT(I915_SAMPLE_BUSY);
/*
@@ -447,7 +444,7 @@ static void i915_pmu_event_read(struct perf_event *event)
static bool engine_needs_busy_stats(struct intel_engine_cs *engine)
{
- return supports_busy_stats(engine->i915) &&
+ return intel_engine_supports_stats(engine) &&
(engine->pmu.enable & BIT(I915_SAMPLE_BUSY));
}
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index d27e124d826a..a35f8d3a55fd 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1527,8 +1527,10 @@ void intel_engines_reset_default_submission(struct drm_i915_private *i915)
struct intel_engine_cs *engine;
enum intel_engine_id id;
- for_each_engine(engine, i915, id)
+ for_each_engine(engine, i915, id) {
engine->set_default_submission(engine);
+ engine->flags |= I915_ENGINE_SUPPORTS_STATS;
+ }
}
/**
@@ -1829,7 +1831,7 @@ int intel_enable_engine_stats(struct intel_engine_cs *engine)
{
unsigned long flags;
- if (INTEL_GEN(engine->i915) < 8)
+ if (!intel_engine_supports_stats(engine))
return -ENODEV;
spin_lock_irqsave(&engine->stats.lock, flags);
@@ -1890,7 +1892,7 @@ void intel_disable_engine_stats(struct intel_engine_cs *engine)
{
unsigned long flags;
- if (INTEL_GEN(engine->i915) < 8)
+ if (!intel_engine_supports_stats(engine))
return;
spin_lock_irqsave(&engine->stats.lock, flags);
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
index cf1cc2cb6722..912ff143d531 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -1453,6 +1453,8 @@ int intel_guc_submission_enable(struct intel_guc *guc)
execlists->tasklet.func = guc_submission_tasklet;
engine->park = guc_submission_park;
engine->unpark = guc_submission_unpark;
+
+ engine->flags &= ~I915_ENGINE_SUPPORTS_STATS;
}
return 0;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 479f880c0f2f..b811f7cddd7e 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1983,6 +1983,8 @@ intel_engine_setup_execlist(struct intel_engine_cs *engine)
execlists->queue = RB_ROOT;
execlists->first = NULL;
+
+ engine->flags |= I915_ENGINE_SUPPORTS_STATS;
}
static void
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index a91ce63b88b6..c68ab3ead83c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -540,6 +540,7 @@ struct intel_engine_cs {
struct intel_engine_hangcheck hangcheck;
#define I915_ENGINE_NEEDS_CMD_PARSER BIT(0)
+#define I915_ENGINE_SUPPORTS_STATS BIT(1)
unsigned int flags;
/*
@@ -604,6 +605,11 @@ static inline bool intel_engine_needs_cmd_parser(struct intel_engine_cs *engine)
return engine->flags & I915_ENGINE_NEEDS_CMD_PARSER;
}
+static inline bool intel_engine_supports_stats(struct intel_engine_cs *engine)
+{
+ return engine->flags & I915_ENGINE_SUPPORTS_STATS;
+}
+
static inline void
execlists_set_active(struct intel_engine_execlists *execlists,
unsigned int bit)
--
2.14.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2017-11-28 13:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-28 12:41 [PATCH 1/4] drm/i915: Move execlists setup out of common Tvrtko Ursulin
2017-11-28 12:41 ` [PATCH 2/4] drm/i915: Move engine->needs_cmd_parser to engine->flags Tvrtko Ursulin
2017-11-28 12:41 ` [PATCH 3/4] drm/i915: Consolidate checks for engine stats availability Tvrtko Ursulin
2017-11-28 12:59 ` Chris Wilson
2017-11-28 13:04 ` Tvrtko Ursulin [this message]
2017-11-29 8:18 ` [PATCH v4 " Sagar Arun Kamble
2017-11-28 12:41 ` [PATCH 4/4] drm/i915: Add GuC support for engine busy stats Tvrtko Ursulin
2017-11-28 13:05 ` [PATCH v2 " Tvrtko Ursulin
2017-11-28 12:48 ` [PATCH 1/4] drm/i915: Move execlists setup out of common Chris Wilson
2017-11-28 13:07 ` Tvrtko Ursulin
2017-11-28 16:04 ` Chris Wilson
2017-11-28 17:29 ` Tvrtko Ursulin
2017-11-28 17:39 ` Chris Wilson
2017-11-28 13:27 ` ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Move execlists setup out of common (rev3) Patchwork
2017-11-28 15:47 ` ✓ Fi.CI.IGT: " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171128130421.4827-1-tvrtko.ursulin@linux.intel.com \
--to=tursulin@ursulin.net \
--cc=Intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox