From mboxrd@z Thu Jan 1 00:00:00 1970 From: Abdiel Janulgue Subject: [PATCH] drm/i915: Ignore TMDS clock limit for DP++ when EDID override is set Date: Thu, 14 Dec 2017 10:24:46 +0200 Message-ID: <20171214082446.5039-1-abdiel.janulgue@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 48AE96E634 for ; Thu, 14 Dec 2017 08:24:54 +0000 (UTC) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: Jani Nikula , Daniel Vetter List-Id: intel-gfx@lists.freedesktop.org NEsgbW9kZXMgdGVzdGluZyBieSB1c2luZyBkdW1teSBFRElEIGRhdGEgaGFzIG5ldmVyIGJlZW4g d29ya2luZwpwcm9wZXJseSBvbiBib3hlcyB3aXRoIERQKysgKGR1YWwtbW9kZSkgYWRhcHRvcnMu IFRoZSByZWFzb24gZm9yCnRoaXMgaXMgdGhhdCAgdGhvc2UgbW9kZXMgZ290IHBydW5lZCBkdXJp bmcgaGRtaSBtb2RlIHZhbGlkYXRpb24uCmludGVsX2hkbWlfbW9kZV92YWxpZCByZXR1cm5zIENM T0NLX0hJR0ggIGJlY2F1c2UgdGhlIHBpeGVsIGNsb2NrCnJlcG9ydGVkIGJ5IHRoZSA0ayBtb2Rl IGlzIGhpZ2hlciB0aGFuIGR1YWwgcG9ydCBUTURTIGNsb2NrIGxpbWl0LgoKSG93ZXZlciA0ayBp bmplY3Rpb24gZG9lcyB3b3JrIHByb3Blcmx5IG9uIG1hY2hpbmVzIHRoYXQgZG9uJ3QgaGF2ZQpE UCsrIGFkYXB0ZXJzIGJlY2F1c2UgdGhlIG1vZGUgaXMgbmV2ZXIgdmFsaWRhdGVkIGFnYWluc3Qg dGhlIERQKysKVE1EUyBjbG9jayBsaW1pdC4KCklnbm9yZSB0aGUgbGltaXRzIHdoZW4gd2UncmUg dGVzdGluZyB1c2luZyBvdmVycmlkZW4gRURJRHMuCgpCdWd6aWxsYTogaHR0cHM6Ly9idWdzLmZy ZWVkZXNrdG9wLm9yZy9zaG93X2J1Zy5jZ2k/aWQ9MTAxNjQ5CkNjOiBWaWxsZSBTeXJqw6Rsw6Qg PHZpbGxlLnN5cmphbGFAbGludXguaW50ZWwuY29tPgpDYzogSmFuaSBOaWt1bGEgPGphbmkubmlr dWxhQGludGVsLmNvbT4KQ2M6IERhbmllbCBWZXR0ZXIgPGRhbmllbC52ZXR0ZXJAZmZ3bGwuY2g+ ClNpZ25lZC1vZmYtYnk6IEFiZGllbCBKYW51bGd1ZSA8YWJkaWVsLmphbnVsZ3VlQGxpbnV4Lmlu dGVsLmNvbT4KLS0tCiBkcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9oZG1pLmMgfCAyICstCiAx IGZpbGUgY2hhbmdlZCwgMSBpbnNlcnRpb24oKyksIDEgZGVsZXRpb24oLSkKCmRpZmYgLS1naXQg YS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9oZG1pLmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkx NS9pbnRlbF9oZG1pLmMKaW5kZXggYmNlZDdiOS4uZDEzMzM1MyAxMDA2NDQKLS0tIGEvZHJpdmVy cy9ncHUvZHJtL2k5MTUvaW50ZWxfaGRtaS5jCisrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2lu dGVsX2hkbWkuYwpAQCAtMTU3Niw3ICsxNTc2LDcgQEAgaW50ZWxfaGRtaV9kcF9kdWFsX21vZGVf ZGV0ZWN0KHN0cnVjdCBkcm1fY29ubmVjdG9yICpjb25uZWN0b3IsIGJvb2wgaGFzX2VkaWQpCiAJ CX0KIAl9CiAKLQlpZiAodHlwZSA9PSBEUk1fRFBfRFVBTF9NT0RFX05PTkUpCisJaWYgKHR5cGUg PT0gRFJNX0RQX0RVQUxfTU9ERV9OT05FIHx8IGNvbm5lY3Rvci0+b3ZlcnJpZGVfZWRpZCkKIAkJ cmV0dXJuOwogCiAJaGRtaS0+ZHBfZHVhbF9tb2RlLnR5cGUgPSB0eXBlOwotLSAKMi43LjQKCl9f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBt YWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3Rz LmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo=