From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org,
Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [PATCH 09/10] drm/i915/cnl: Fix DP max rate for Cannonlake with port F.
Date: Mon, 22 Jan 2018 18:46:25 +0200 [thread overview]
Message-ID: <20180122164625.GE5453@intel.com> (raw)
In-Reply-To: <20180120000524.4746-9-rodrigo.vivi@intel.com>
On Fri, Jan 19, 2018 at 04:05:23PM -0800, Rodrigo Vivi wrote:
> On CNL SKUs that uses port F, max DP rate is 8.1G for all
> ports when we have the elevated voltage.
>
> v2: Make commit message more generic.
>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 4b963732454d..36826460d8fb 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -240,8 +240,9 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
> source_rates = cnl_rates;
> size = ARRAY_SIZE(cnl_rates);
> voltage = I915_READ(CNL_PORT_COMP_DW3) & VOLTAGE_INFO_MASK;
> - if (port == PORT_A || port == PORT_D ||
> - voltage == VOLTAGE_INFO_0_85V)
> + if (voltage == VOLTAGE_INFO_0_85V ||
> + (!IS_CNL_WITH_PORT_F(dev_priv) && (port == PORT_A ||
> + port == PORT_D)))
This is getting a bit hard to parse. Maybe move all these checks to a
small helper that is easier to read?
> size -= 2;
> } else if (IS_GEN9_BC(dev_priv)) {
> source_rates = skl_rates;
> --
> 2.13.6
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2018-01-22 16:46 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-20 0:05 [PATCH 01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU Rodrigo Vivi
2018-01-20 0:05 ` [PATCH 02/10] drm/i915/cnl: Add AUX-F support Rodrigo Vivi
2018-01-22 23:42 ` Pandiyan, Dhinakaran
2018-01-22 23:59 ` [PATCH] " Rodrigo Vivi
2018-01-23 2:43 ` Pandiyan, Dhinakaran
2018-01-23 4:53 ` Pandiyan, Dhinakaran
2018-01-23 16:12 ` Lucas De Marchi
2018-01-23 16:30 ` Rodrigo Vivi
2018-01-23 18:35 ` Runyan, Arthur J
2018-01-23 21:57 ` [PATCH] drm/i915/cnl: Extend Wa 1178 to Aux F Rodrigo Vivi
2018-01-23 23:21 ` Lucas De Marchi
2018-01-23 21:10 ` [PATCH] drm/i915/cnl: Add AUX-F support Rodrigo Vivi
2018-01-20 0:05 ` [PATCH 03/10] drm/i915/cnl: Fix _CNL_PORT_TX_DW2_LN0_F definition Rodrigo Vivi
2018-01-20 0:05 ` [PATCH 04/10] drm/i915: Fix DPLCLKA_CFGCR0 bits for Port F Rodrigo Vivi
2018-01-22 21:44 ` Pandiyan, Dhinakaran
2018-01-22 23:08 ` Rodrigo Vivi
2018-01-20 0:05 ` [PATCH 05/10] drm/i915/cnl: Add right GMBUS pin number for HDMI on " Rodrigo Vivi
2018-01-20 0:05 ` [PATCH 06/10] drm/i915: For HPD connected port use hpd_pin instead of port Rodrigo Vivi
2018-01-22 16:40 ` Ville Syrjälä
2018-01-22 23:05 ` [PATCH] " Rodrigo Vivi
2018-01-20 0:05 ` [PATCH 07/10] drm/i915/cnl: Add HPD support for Port F Rodrigo Vivi
2018-01-22 16:51 ` Ville Syrjälä
2018-01-22 23:20 ` Rodrigo Vivi
2018-01-20 0:05 ` [PATCH 08/10] drm/i915/cnl: Enable DDI-F on Cannonlake Rodrigo Vivi
2018-01-23 3:12 ` Pandiyan, Dhinakaran
2018-01-23 16:29 ` Rodrigo Vivi
2018-01-20 0:05 ` [PATCH 09/10] drm/i915/cnl: Fix DP max rate for Cannonlake with port F Rodrigo Vivi
2018-01-22 16:46 ` Ville Syrjälä [this message]
2018-01-23 22:32 ` [PATCH] " Rodrigo Vivi
2018-01-23 22:45 ` Manasi Navare
2018-01-20 0:05 ` [PATCH 10/10] drm/i915/cnl: Don't try to manage Port F power wells on all CNL Rodrigo Vivi
2018-01-22 12:12 ` Imre Deak
2018-01-22 23:48 ` [PATCH] " Rodrigo Vivi
2018-01-23 3:03 ` Pandiyan, Dhinakaran
2018-01-23 16:27 ` Rodrigo Vivi
2018-01-23 23:11 ` Rodrigo Vivi
2018-01-20 0:30 ` ✓ Fi.CI.BAT: success for series starting with [01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU Patchwork
2018-01-20 8:40 ` ✗ Fi.CI.IGT: warning " Patchwork
2018-01-22 16:56 ` [PATCH 01/10] " Ville Syrjälä
2018-01-22 23:00 ` Rodrigo Vivi
2018-01-23 0:11 ` ✓ Fi.CI.BAT: success for series starting with [01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU. (rev4) Patchwork
2018-01-23 0:32 ` ✓ Fi.CI.BAT: success for series starting with [01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU. (rev5) Patchwork
2018-01-23 6:54 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-01-23 22:16 ` ✗ Fi.CI.BAT: failure for series starting with [01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU. (rev6) Patchwork
2018-01-23 22:36 ` ✗ Fi.CI.BAT: failure for series starting with [01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU. (rev7) Patchwork
2018-01-23 23:15 ` ✗ Fi.CI.BAT: failure for series starting with [01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU. (rev8) Patchwork
2018-01-25 17:40 ` [PATCH 01/10] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU Paulo Zanoni
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