* [PATCH] drm/i915/psr: Check for power state control capability.
@ 2018-02-27 3:27 Dhinakaran Pandiyan
2018-02-27 4:14 ` ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Dhinakaran Pandiyan @ 2018-02-27 3:27 UTC (permalink / raw)
To: intel-gfx; +Cc: Dhinakaran Pandiyan, Nathan D Ciobanu, Rodrigo Vivi
eDP spec says - "If PSR/PSR2 is supported, the SET_POWER_CAPABLE bit in the
EDP_GENERAL_CAPABILITY_1 register (DPCD Address 00701h, bit d7) must be set
to 1."
Reject PSR on panels without this cap bit set as such panels cannot be
controlled via SET_POWER & SET_DP_PWR_VOLTAGE register and the DP source
needs to be able to do that for PSR.
Thanks to Nathan for debugging this.
Panel cap checks like this can be done just once, let's fix this
when PSR dpcd init movement lands.
Cc: Nathan D Ciobanu <nathan.d.ciobanu@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 89f41d28c44a..e0701b7f87f7 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -405,6 +405,11 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
return;
}
+ if (!(intel_dp->edp_dpcd[1] & DP_EDP_SET_POWER_CAP)) {
+ DRM_DEBUG_KMS("PSR condition failed: panel lacks power state control\n");
+ return;
+ }
+
/*
* FIXME psr2_support is messed up. It's both computed
* dynamically during PSR enable, and extracted from sink
--
2.14.1
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^ permalink raw reply related [flat|nested] 5+ messages in thread* ✓ Fi.CI.BAT: success for drm/i915/psr: Check for power state control capability.
2018-02-27 3:27 [PATCH] drm/i915/psr: Check for power state control capability Dhinakaran Pandiyan
@ 2018-02-27 4:14 ` Patchwork
2018-02-27 5:34 ` ✓ Fi.CI.IGT: " Patchwork
2018-02-27 17:55 ` [PATCH] " Nathan Ciobanu
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2018-02-27 4:14 UTC (permalink / raw)
To: Pandiyan, Dhinakaran; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/psr: Check for power state control capability.
URL : https://patchwork.freedesktop.org/series/39006/
State : success
== Summary ==
Series 39006v1 drm/i915/psr: Check for power state control capability.
https://patchwork.freedesktop.org/api/1.0/series/39006/revisions/1/mbox/
fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:421s
fi-bdw-gvtdvm total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:422s
fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:372s
fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:480s
fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:284s
fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:480s
fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:482s
fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:462s
fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:452s
fi-cfl-8700k total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:391s
fi-cfl-s2 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:557s
fi-cnl-y3 total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:567s
fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:415s
fi-gdg-551 total:288 pass:179 dwarn:0 dfail:0 fail:1 skip:108 time:283s
fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:507s
fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:386s
fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:409s
fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:456s
fi-ivb-3770 total:288 pass:255 dwarn:0 dfail:0 fail:0 skip:33 time:408s
fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:460s
fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:489s
fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:451s
fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:493s
fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:585s
fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:423s
fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:498s
fi-skl-6700hq total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:514s
fi-skl-6700k2 total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:488s
fi-skl-6770hq total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:473s
fi-skl-guc total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:403s
fi-skl-gvtdvm total:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:427s
fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:518s
fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:388s
7c50cf4f0dc70112cd82f4475308299df810f302 drm-tip: 2018y-02m-26d-22h-51m-08s UTC integration manifest
82fc31e49ad0 drm/i915/psr: Check for power state control capability.
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8170/issues.html
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/psr: Check for power state control capability.
2018-02-27 3:27 [PATCH] drm/i915/psr: Check for power state control capability Dhinakaran Pandiyan
2018-02-27 4:14 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2018-02-27 5:34 ` Patchwork
2018-02-27 17:55 ` [PATCH] " Nathan Ciobanu
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2018-02-27 5:34 UTC (permalink / raw)
To: Pandiyan, Dhinakaran; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/psr: Check for power state control capability.
URL : https://patchwork.freedesktop.org/series/39006/
State : success
== Summary ==
---- Possible new issues:
Test kms_vblank:
Subgroup pipe-a-query-forked-busy-hang:
dmesg-warn -> PASS (shard-hsw)
---- Known issues:
Test drv_suspend:
Subgroup debugfs-reader:
pass -> SKIP (shard-hsw) k.org#196691
Test kms_chv_cursor_fail:
Subgroup pipe-b-64x64-bottom-edge:
dmesg-warn -> PASS (shard-snb) fdo#105185
Test kms_cursor_legacy:
Subgroup 2x-long-flip-vs-cursor-atomic:
pass -> FAIL (shard-hsw) fdo#104873
Test kms_flip:
Subgroup flip-vs-absolute-wf_vblank:
fail -> PASS (shard-hsw) fdo#100368
Subgroup modeset-vs-vblank-race:
fail -> PASS (shard-hsw) fdo#103060
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-pri-indfb-multidraw:
fail -> PASS (shard-apl) fdo#103167
k.org#196691 https://bugzilla.kernel.org/show_bug.cgi?id=196691
fdo#105185 https://bugs.freedesktop.org/show_bug.cgi?id=105185
fdo#104873 https://bugs.freedesktop.org/show_bug.cgi?id=104873
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167
shard-apl total:3460 pass:1818 dwarn:1 dfail:0 fail:7 skip:1633 time:12188s
shard-hsw total:3460 pass:1765 dwarn:1 dfail:0 fail:2 skip:1691 time:11710s
shard-snb total:3460 pass:1359 dwarn:1 dfail:0 fail:1 skip:2099 time:6536s
Blacklisted hosts:
shard-kbl total:3442 pass:1924 dwarn:1 dfail:0 fail:7 skip:1509 time:9222s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8170/shards.html
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] drm/i915/psr: Check for power state control capability.
2018-02-27 3:27 [PATCH] drm/i915/psr: Check for power state control capability Dhinakaran Pandiyan
2018-02-27 4:14 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-02-27 5:34 ` ✓ Fi.CI.IGT: " Patchwork
@ 2018-02-27 17:55 ` Nathan Ciobanu
2018-02-27 20:26 ` Rodrigo Vivi
2 siblings, 1 reply; 5+ messages in thread
From: Nathan Ciobanu @ 2018-02-27 17:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Dhinakaran Pandiyan, Nathan D Ciobanu, Rodrigo Vivi
On Mon, Feb 26, 2018 at 07:27:23PM -0800, Dhinakaran Pandiyan wrote:
> eDP spec says - "If PSR/PSR2 is supported, the SET_POWER_CAPABLE bit in the
> EDP_GENERAL_CAPABILITY_1 register (DPCD Address 00701h, bit d7) must be set
> to 1."
>
> Reject PSR on panels without this cap bit set as such panels cannot be
> controlled via SET_POWER & SET_DP_PWR_VOLTAGE register and the DP source
> needs to be able to do that for PSR.
>
> Thanks to Nathan for debugging this.
>
> Panel cap checks like this can be done just once, let's fix this
> when PSR dpcd init movement lands.
>
> Cc: Nathan D Ciobanu <nathan.d.ciobanu@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Tested-by: Nathan Ciobanu <nathan.d.ciobanu@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_psr.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index 89f41d28c44a..e0701b7f87f7 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -405,6 +405,11 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
> return;
> }
>
> + if (!(intel_dp->edp_dpcd[1] & DP_EDP_SET_POWER_CAP)) {
> + DRM_DEBUG_KMS("PSR condition failed: panel lacks power state control\n");
> + return;
> + }
> +
> /*
> * FIXME psr2_support is messed up. It's both computed
> * dynamically during PSR enable, and extracted from sink
> --
> 2.14.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] drm/i915/psr: Check for power state control capability.
2018-02-27 17:55 ` [PATCH] " Nathan Ciobanu
@ 2018-02-27 20:26 ` Rodrigo Vivi
0 siblings, 0 replies; 5+ messages in thread
From: Rodrigo Vivi @ 2018-02-27 20:26 UTC (permalink / raw)
To: Nathan Ciobanu; +Cc: intel-gfx, Dhinakaran Pandiyan, Nathan D Ciobanu
On Tue, Feb 27, 2018 at 09:55:56AM -0800, Nathan Ciobanu wrote:
> On Mon, Feb 26, 2018 at 07:27:23PM -0800, Dhinakaran Pandiyan wrote:
> > eDP spec says - "If PSR/PSR2 is supported, the SET_POWER_CAPABLE bit in the
> > EDP_GENERAL_CAPABILITY_1 register (DPCD Address 00701h, bit d7) must be set
> > to 1."
> >
> > Reject PSR on panels without this cap bit set as such panels cannot be
> > controlled via SET_POWER & SET_DP_PWR_VOLTAGE register and the DP source
> > needs to be able to do that for PSR.
> >
> > Thanks to Nathan for debugging this.
> >
> > Panel cap checks like this can be done just once, let's fix this
> > when PSR dpcd init movement lands.
> >
> > Cc: Nathan D Ciobanu <nathan.d.ciobanu@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Tested-by: Nathan Ciobanu <nathan.d.ciobanu@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
merging right now. Thanks for the patch, debugs and testing.
> > ---
> > drivers/gpu/drm/i915/intel_psr.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> > index 89f41d28c44a..e0701b7f87f7 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -405,6 +405,11 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
> > return;
> > }
> >
> > + if (!(intel_dp->edp_dpcd[1] & DP_EDP_SET_POWER_CAP)) {
> > + DRM_DEBUG_KMS("PSR condition failed: panel lacks power state control\n");
> > + return;
> > + }
> > +
> > /*
> > * FIXME psr2_support is messed up. It's both computed
> > * dynamically during PSR enable, and extracted from sink
> > --
> > 2.14.1
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
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2018-02-27 3:27 [PATCH] drm/i915/psr: Check for power state control capability Dhinakaran Pandiyan
2018-02-27 4:14 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-02-27 5:34 ` ✓ Fi.CI.IGT: " Patchwork
2018-02-27 17:55 ` [PATCH] " Nathan Ciobanu
2018-02-27 20:26 ` Rodrigo Vivi
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