From mboxrd@z Thu Jan 1 00:00:00 1970 From: Benson Leung Subject: Re: [PATCH] drm/dp: Correctly mask DP_TRAINING_AUX_RD_INTERVAL values for DP 1.4 Date: Wed, 7 Mar 2018 16:36:21 -0800 Message-ID: <20180308003621.GA150207@decatoncale.mtv.corp.google.com> References: <1520029558-12219-1-git-send-email-matthew.s.atwood@intel.com> <1520468038-11503-1-git-send-email-matthew.s.atwood@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0581486963==" Return-path: In-Reply-To: <1520468038-11503-1-git-send-email-matthew.s.atwood@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: matthew.s.atwood@intel.com Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0581486963== Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="oyUTqETQ0mS9luUI" Content-Disposition: inline --oyUTqETQ0mS9luUI Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hey Matt, Your patch doesn't build. Missing semicolon, dude. On Wed, Mar 07, 2018 at 04:13:58PM -0800, matthew.s.atwood@intel.com wrote: > From: Matt Atwood >=20 > DP_TRAINING_AUX_RD_INTERVAL with DP 1.3 spec changed bit scheeme from 8 > bits to 7 in DPCD 0x000e. The 8th bit is used to identify extended > receiver capabilities. For panels that use this new feature wait interval > would be increased by 512 ms, when spec is max 16 ms. This behavior is > described in table 2-158 of DP 1.4 spec address 0000eh. >=20 > With the introduction of DP 1.4 spec main link clock recovery was > standardized to 100 us regardless of TRAINING_AUX_RD_INTERVAL value. >=20 > To avoid breaking panels that are not spec compiant we now warn on > invalid values. >=20 > V2: commit title/message, masking all 7 bits, warn on out of spec values. > V3: commit message, make link train clock recovery follow DP 1.4 spec. > V4: style changes >=20 > Signed-off-by: Matt Atwood > --- > drivers/gpu/drm/drm_dp_helper.c | 18 ++++++++++++++---- > include/drm/drm_dp_helper.h | 6 ++++++ > 2 files changed, 20 insertions(+), 4 deletions(-) >=20 > diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_hel= per.c > index adf79be..6985ff3 100644 > --- a/drivers/gpu/drm/drm_dp_helper.c > +++ b/drivers/gpu/drm/drm_dp_helper.c > @@ -119,18 +119,28 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 = link_status[DP_LINK_STATUS_SI > EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis); > =20 > void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CA= P_SIZE]) { > - if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] =3D=3D 0) > + int rd_interval =3D dpcd[DP_TRAINING_AUX_RD_INTERVAL] & DP_TRAINING_AUX= _RD_MASK; > + > + if (rd_interval > 4) > + DRM_DEBUG_KMS("AUX interval %d, out of range (max 4)", rd_interval); > + > + if (rd_interval =3D=3D 0 || (dpcd[DP_DPCD_REV] >=3D DP_REV_14)) > udelay(100); > else > - mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4); > + mdelay(rd_interval * 4) Need a semicolon here. /mnt/host/source/src/third_party/kernel/v4.14/drivers/gpu/drm/drm_dp_helper= =2Ec: In function 'drm_dp_link_train_clock_recovery_delay': /mnt/host/source/src/third_party/kernel/v4.14/drivers/gpu/drm/drm_dp_helper= =2Ec:131:1: error: expected ';' before '}' token } ^ make[4]: *** [/mnt/host/source/src/third_party/kernel/v4.14/scripts/Makefil= e.build:320: drivers/gpu/drm/drm_dp_helper.o] Error 1 Thanks, Benson --=20 Benson Leung Staff Software Engineer Chrome OS Kernel Google Inc. bleung@google.com Chromium OS Project bleung@chromium.org --oyUTqETQ0mS9luUI Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE6gYDF28Li+nEiKLaHwn1ewov5lgFAlqghYUACgkQHwn1ewov 5lhHWhAAu2hRsQ9kRQqOVGX9ZHW57yuu5ZwpAc4qo1CXOi2pELegX6iB0+aNE6Vh iayJcVwSqTWsK/BD0RYt4G/xiaYYIAnfkgLvQv1uiEQwPRsl6onFbKEJM8pK5Au7 vfYbN+s/Dhn5K5Ib77UWOLtgrNTqtqF7ryv9g8qTWqlCfhiNPcKdQSceC8kTRtqs +lG8OJBQrq8x7IAqgSGH1amokexNy+6QaHiJTqF0wtOCL8paa8me0p1c8wV0qKhk pEwkqB68CZPAmfWPjJ18azYztC1RY9HJwso9pLHkIFFv+EzZPplIyEGu8d1YBvQW p2MsmXRmidY0OAlBWQH3iID4V0hj12Y0x/kiaKprRc9XeI+rMNsunE8Bzn55p5/b An0xmKT4MqT043YLfekM/OA+L/6fyWijbwYcpyJhdaEJ8GsLAWik3NPyR9w376GL A6YXTS+MxuuqhqtQ1soPsS0MjugQbTOijWBlXcvsn2ECeOmK2rGng1MB85xDPjsk pwKVqiTwpQKU/kSmVLxH+ePYXACZD7W85qjPSI4YR7Knmw/mmMkIZ1wfnBJRRjMP IN3xH+HVDqZmcC2YHZbkR/B8aK1swRcd/zB1Kp0UpPmvoud2lFFGV5zj8HGroZ0t aIAxwXtmLH5OMZ06Nhw6GA4V7g8ghWVoZS4dHGzkcjfKLcZP7gg= =6MmW -----END PGP SIGNATURE----- --oyUTqETQ0mS9luUI-- --===============0581486963== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVs IG1haWxpbmcgbGlzdApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== --===============0581486963==--