* [PATCH] drm/i915: Fix CHICKEN_TRANS register offset
@ 2018-06-27 23:14 José Roberto de Souza
2018-06-27 23:42 ` ✓ Fi.CI.BAT: success for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: José Roberto de Souza @ 2018-06-27 23:14 UTC (permalink / raw)
To: intel-gfx; +Cc: Dhinakaran Pandiyan
This registers offsets is not sequential for transcoder D and EDP so
for EDP transcoder it was writing to 0x420d0 that do not map to
any register in spec.
CHICKEN_TRANS is used in PSR2 and intel_enable_ddi_hdmi() to apply
WA #1143 but I'm not aware of any open issue cause by this offset
error.
Spec: 7524
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c30cfcd90754..098a4cb71310 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7256,9 +7256,17 @@ enum {
#define BDW_DPRS_MASK_VBLANK_SRD (1 << 0)
#define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
-#define CHICKEN_TRANS_A 0x420c0
-#define CHICKEN_TRANS_B 0x420c4
-#define CHICKEN_TRANS(trans) _MMIO_TRANS(trans, CHICKEN_TRANS_A, CHICKEN_TRANS_B)
+#define _CHICKEN_TRANS_A 0x420c0
+#define _CHICKEN_TRANS_B 0x420c4
+#define _CHICKEN_TRANS_C 0x420c8
+#define _CHICKEN_TRANS_D 0x420d8
+#define _CHICKEN_TRANS_EDP 0x420cc
+#define CHICKEN_TRANS(trans) _MMIO(_PICK(trans, \
+ _CHICKEN_TRANS_A, \
+ _CHICKEN_TRANS_B, \
+ _CHICKEN_TRANS_C, \
+ _CHICKEN_TRANS_D, \
+ _CHICKEN_TRANS_EDP))
#define VSC_DATA_SEL_SOFTWARE_CONTROL (1 << 25) /* GLK and CNL+ */
#define DDI_TRAINING_OVERRIDE_ENABLE (1 << 19)
#define DDI_TRAINING_OVERRIDE_VALUE (1 << 18)
--
2.18.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 4+ messages in thread* ✓ Fi.CI.BAT: success for drm/i915: Fix CHICKEN_TRANS register offset
2018-06-27 23:14 [PATCH] drm/i915: Fix CHICKEN_TRANS register offset José Roberto de Souza
@ 2018-06-27 23:42 ` Patchwork
2018-06-28 4:54 ` [PATCH] " Rodrigo Vivi
2018-06-28 5:53 ` ✓ Fi.CI.IGT: success for " Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2018-06-27 23:42 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Fix CHICKEN_TRANS register offset
URL : https://patchwork.freedesktop.org/series/45536/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4392 -> Patchwork_9456 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/45536/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_9456 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@kms_flip@basic-flip-vs-dpms:
fi-skl-6700hq: PASS -> DMESG-WARN (fdo#105998, fdo#107054)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: PASS -> INCOMPLETE (fdo#103927, fdo#107054)
igt@prime_vgem@basic-fence-flip:
fi-ilk-650: PASS -> FAIL (fdo#104008)
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
fdo#107054 https://bugs.freedesktop.org/show_bug.cgi?id=107054
== Participating hosts (45 -> 40) ==
Missing (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4392 -> Patchwork_9456
CI_DRM_4392: fa0510c4f4d6e85cba3068f08a83cb56b9fdf668 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9456: dc2c463beb7c24876f33d086d2fb3c9427fe576e @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
dc2c463beb7c drm/i915: Fix CHICKEN_TRANS register offset
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9456/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] drm/i915: Fix CHICKEN_TRANS register offset
2018-06-27 23:14 [PATCH] drm/i915: Fix CHICKEN_TRANS register offset José Roberto de Souza
2018-06-27 23:42 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2018-06-28 4:54 ` Rodrigo Vivi
2018-06-28 5:53 ` ✓ Fi.CI.IGT: success for " Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Rodrigo Vivi @ 2018-06-28 4:54 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx, Dhinakaran Pandiyan
On Wed, Jun 27, 2018 at 04:14:01PM -0700, José Roberto de Souza wrote:
> This registers offsets is not sequential for transcoder D and EDP so
> for EDP transcoder it was writing to 0x420d0 that do not map to
> any register in spec.
>
> CHICKEN_TRANS is used in PSR2 and intel_enable_ddi_hdmi() to apply
> WA #1143 but I'm not aware of any open issue cause by this offset
> error.
>
> Spec: 7524
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index c30cfcd90754..098a4cb71310 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7256,9 +7256,17 @@ enum {
> #define BDW_DPRS_MASK_VBLANK_SRD (1 << 0)
> #define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
>
> -#define CHICKEN_TRANS_A 0x420c0
> -#define CHICKEN_TRANS_B 0x420c4
> -#define CHICKEN_TRANS(trans) _MMIO_TRANS(trans, CHICKEN_TRANS_A, CHICKEN_TRANS_B)
> +#define _CHICKEN_TRANS_A 0x420c0
> +#define _CHICKEN_TRANS_B 0x420c4
> +#define _CHICKEN_TRANS_C 0x420c8
> +#define _CHICKEN_TRANS_D 0x420d8
note that enum transcoder has no TRANSCODER_D...
TRANSCODER_EDP = 3
so:
>>> hex(0x420c0+3*4)
'0x420cc'
> +#define _CHICKEN_TRANS_EDP 0x420cc
> +#define CHICKEN_TRANS(trans) _MMIO(_PICK(trans, \
> + _CHICKEN_TRANS_A, \
> + _CHICKEN_TRANS_B, \
> + _CHICKEN_TRANS_C, \
> + _CHICKEN_TRANS_D, \
> + _CHICKEN_TRANS_EDP))
> #define VSC_DATA_SEL_SOFTWARE_CONTROL (1 << 25) /* GLK and CNL+ */
> #define DDI_TRAINING_OVERRIDE_ENABLE (1 << 19)
> #define DDI_TRAINING_OVERRIDE_VALUE (1 << 18)
> --
> 2.18.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread* ✓ Fi.CI.IGT: success for drm/i915: Fix CHICKEN_TRANS register offset
2018-06-27 23:14 [PATCH] drm/i915: Fix CHICKEN_TRANS register offset José Roberto de Souza
2018-06-27 23:42 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-06-28 4:54 ` [PATCH] " Rodrigo Vivi
@ 2018-06-28 5:53 ` Patchwork
2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2018-06-28 5:53 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Fix CHICKEN_TRANS register offset
URL : https://patchwork.freedesktop.org/series/45536/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4392_full -> Patchwork_9456_full =
== Summary - SUCCESS ==
No regressions found.
== Known issues ==
Here are the changes found in Patchwork_9456_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_selftest@mock_scatterlist:
shard-glk: NOTRUN -> DMESG-WARN (fdo#103667)
igt@gem_ctx_isolation@rcs0-s3:
shard-kbl: PASS -> INCOMPLETE (fdo#103665) +1
igt@gem_exec_schedule@pi-ringfull-bsd:
shard-glk: NOTRUN -> FAIL (fdo#103158)
igt@gem_exec_schedule@preemptive-hang-render:
shard-snb: SKIP -> INCOMPLETE (fdo#105411)
igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
shard-glk: PASS -> FAIL (fdo#105363)
igt@kms_flip@2x-plain-flip-fb-recreate:
shard-glk: PASS -> FAIL (fdo#100368)
igt@kms_flip@plain-flip-ts-check-interruptible:
{shard-glk9}: PASS -> FAIL (fdo#100368)
igt@kms_flip_tiling@flip-to-y-tiled:
shard-glk: PASS -> FAIL (fdo#104724) +1
igt@kms_flip_tiling@flip-x-tiled:
shard-glk: NOTRUN -> FAIL (fdo#104724, fdo#103822)
==== Possible fixes ====
igt@gem_exec_big:
shard-hsw: INCOMPLETE (fdo#103540) -> PASS
igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
shard-glk: FAIL (fdo#105703) -> PASS
igt@kms_flip@flip-vs-expired-vblank-interruptible:
shard-hsw: FAIL (fdo#105363, fdo#102887) -> PASS
igt@kms_setmode@basic:
shard-apl: FAIL (fdo#99912) -> PASS
shard-kbl: FAIL (fdo#99912) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103158 https://bugs.freedesktop.org/show_bug.cgi?id=103158
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540
fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
fdo#103667 https://bugs.freedesktop.org/show_bug.cgi?id=103667
fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822
fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
fdo#105703 https://bugs.freedesktop.org/show_bug.cgi?id=105703
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
== Participating hosts (6 -> 6) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4392 -> Patchwork_9456
CI_DRM_4392: fa0510c4f4d6e85cba3068f08a83cb56b9fdf668 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4530: 0e98bf69f146eb72fe3a7c3b19a049b5786f0ca3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9456: dc2c463beb7c24876f33d086d2fb3c9427fe576e @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9456/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
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2018-06-27 23:14 [PATCH] drm/i915: Fix CHICKEN_TRANS register offset José Roberto de Souza
2018-06-27 23:42 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-06-28 4:54 ` [PATCH] " Rodrigo Vivi
2018-06-28 5:53 ` ✓ Fi.CI.IGT: success for " Patchwork
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