* [PATCH] drm/i915: Mark expected switch fall-throughs
@ 2018-06-28 22:35 Gustavo A. R. Silva
2018-06-29 0:01 ` ✓ Fi.CI.BAT: success for drm/i915: Mark expected switch fall-throughs (rev2) Patchwork
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Gustavo A. R. Silva @ 2018-06-28 22:35 UTC (permalink / raw)
To: Jani Nikula, Joonas Lahtinen, Rodrigo Vivi, David Airlie
Cc: intel-gfx, linux-kernel, dri-devel, Gustavo A. R. Silva
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Addresses-Coverity-ID: 141432
Addresses-Coverity-ID: 141433
Addresses-Coverity-ID: 141434
Addresses-Coverity-ID: 141435
Addresses-Coverity-ID: 141436
Addresses-Coverity-ID: 1357360
Addresses-Coverity-ID: 1357403
Addresses-Coverity-ID: 1357433
Addresses-Coverity-ID: 1392622
Addresses-Coverity-ID: 1415273
Addresses-Coverity-ID: 1435752
Addresses-Coverity-ID: 1441500
Addresses-Coverity-ID: 1454596
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
---
drivers/gpu/drm/i915/i915_gem.c | 1 +
drivers/gpu/drm/i915/i915_gem_stolen.c | 1 +
drivers/gpu/drm/i915/intel_cdclk.c | 5 +++++
drivers/gpu/drm/i915/intel_ddi.c | 1 +
drivers/gpu/drm/i915/intel_display.c | 2 ++
drivers/gpu/drm/i915/intel_dpll_mgr.c | 3 +++
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_engine_cs.c | 1 +
drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
drivers/gpu/drm/i915/intel_sdvo.c | 6 ++++++
10 files changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4cb720b..ed7bb24 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2114,6 +2114,7 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
*/
if (!i915_terminally_wedged(&dev_priv->gpu_error))
return VM_FAULT_SIGBUS;
+ /* else: fall through */
case -EAGAIN:
/*
* EAGAIN means the gpu is hung and we'll wait for the error
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
index 79a34729..055f868 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -254,6 +254,7 @@ static void vlv_get_stolen_reserved(struct drm_i915_private *dev_priv,
switch (reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK) {
default:
MISSING_CASE(reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);
+ /* fall through */
case GEN7_STOLEN_RESERVED_1M:
*size = 1024 * 1024;
break;
diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index bf9433d..29075c7 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -316,6 +316,7 @@ static void pnv_get_cdclk(struct drm_i915_private *dev_priv,
break;
default:
DRM_ERROR("Unknown pnv display core clock 0x%04x\n", gcfgc);
+ /* fall through */
case GC_DISPLAY_CLOCK_133_MHZ_PNV:
cdclk_state->cdclk = 133333;
break;
@@ -1797,6 +1798,7 @@ static int icl_calc_cdclk(int min_cdclk, unsigned int ref)
switch (ref) {
default:
MISSING_CASE(ref);
+ /* fall through */
case 24000:
ranges = ranges_24;
break;
@@ -1824,6 +1826,7 @@ static int icl_calc_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk)
switch (cdclk) {
default:
MISSING_CASE(cdclk);
+ /* fall through */
case 307200:
case 556800:
case 652800:
@@ -1896,6 +1899,7 @@ static u8 icl_calc_voltage_level(int cdclk)
return 1;
default:
MISSING_CASE(cdclk);
+ /* fall through */
case 652800:
case 648000:
return 2;
@@ -1913,6 +1917,7 @@ static void icl_get_cdclk(struct drm_i915_private *dev_priv,
switch (val & ICL_DSSM_CDCLK_PLL_REFCLK_MASK) {
default:
MISSING_CASE(val);
+ /* fall through */
case ICL_DSSM_CDCLK_PLL_REFCLK_24MHz:
cdclk_state->ref = 24000;
break;
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 0319825..c74b01a 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1069,6 +1069,7 @@ static uint32_t icl_pll_to_ddi_pll_sel(struct intel_encoder *encoder,
switch (id) {
default:
MISSING_CASE(id);
+ /* fall through */
case DPLL_ID_ICL_DPLL0:
case DPLL_ID_ICL_DPLL1:
return DDI_CLK_SEL_NONE;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index eaa0663..d3f2cf6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9359,6 +9359,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
default:
WARN(1, "unknown pipe linked to edp transcoder\n");
+ /* fall through */
case TRANS_DDI_EDP_INPUT_A_ONOFF:
case TRANS_DDI_EDP_INPUT_A_ON:
trans_edp_pipe = PIPE_A;
@@ -11023,6 +11024,7 @@ static bool check_digital_port_conflicts(struct drm_atomic_state *state)
case INTEL_OUTPUT_DDI:
if (WARN_ON(!HAS_DDI(to_i915(dev))))
break;
+ /* else: fall through */
case INTEL_OUTPUT_DP:
case INTEL_OUTPUT_HDMI:
case INTEL_OUTPUT_EDP:
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 5734236..058696b 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -2566,6 +2566,7 @@ int icl_calc_dp_combo_pll_link(struct drm_i915_private *dev_priv,
switch (index) {
default:
MISSING_CASE(index);
+ /* fall through */
case 0:
link_clock = 540000;
break;
@@ -2639,6 +2640,7 @@ static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc,
switch (div1) {
default:
MISSING_CASE(div1);
+ /* fall through */
case 2:
hsdiv = 0;
break;
@@ -2903,6 +2905,7 @@ static i915_reg_t icl_pll_id_to_enable_reg(enum intel_dpll_id id)
switch (id) {
default:
MISSING_CASE(id);
+ /* fall through */
case DPLL_ID_ICL_DPLL0:
case DPLL_ID_ICL_DPLL1:
return CNL_DPLL_ENABLE(id);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index a6ff260..3cb6e87 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1254,6 +1254,7 @@ enc_to_dig_port(struct drm_encoder *encoder)
switch (intel_encoder->type) {
case INTEL_OUTPUT_DDI:
WARN_ON(!HAS_DDI(to_i915(encoder->dev)));
+ /* fall through */
case INTEL_OUTPUT_DP:
case INTEL_OUTPUT_EDP:
case INTEL_OUTPUT_HDMI:
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index d3264bd..d2ed44d 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -230,6 +230,7 @@ __intel_engine_context_size(struct drm_i915_private *dev_priv, u8 class)
break;
default:
MISSING_CASE(class);
+ /* fall through */
case VIDEO_DECODE_CLASS:
case VIDEO_ENHANCEMENT_CLASS:
case COPY_ENGINE_CLASS:
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index d81b2cf..6b5aa3b 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3212,6 +3212,7 @@ static void cnl_set_procmon_ref_values(struct drm_i915_private *dev_priv,
switch (val & (PROCESS_INFO_MASK | VOLTAGE_INFO_MASK)) {
default:
MISSING_CASE(val);
+ /* fall through */
case VOLTAGE_INFO_0_85V | PROCESS_INFO_DOT_0:
procmon = &cnl_procmon_values[PROCMON_0_85V_DOT_0];
break;
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index e6a64b3..a7f4a56 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -1340,6 +1340,7 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
switch (crtc_state->pixel_multiplier) {
default:
WARN(1, "unknown pixel multiplier specified\n");
+ /* fall through */
case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
@@ -2316,14 +2317,19 @@ intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
switch (sdvo->controlled_output) {
case SDVO_OUTPUT_LVDS1:
mask |= SDVO_OUTPUT_LVDS1;
+ /* fall through */
case SDVO_OUTPUT_LVDS0:
mask |= SDVO_OUTPUT_LVDS0;
+ /* fall through */
case SDVO_OUTPUT_TMDS1:
mask |= SDVO_OUTPUT_TMDS1;
+ /* fall through */
case SDVO_OUTPUT_TMDS0:
mask |= SDVO_OUTPUT_TMDS0;
+ /* fall through */
case SDVO_OUTPUT_RGB1:
mask |= SDVO_OUTPUT_RGB1;
+ /* fall through */
case SDVO_OUTPUT_RGB0:
mask |= SDVO_OUTPUT_RGB0;
break;
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Mark expected switch fall-throughs (rev2)
2018-06-28 22:35 [PATCH] drm/i915: Mark expected switch fall-throughs Gustavo A. R. Silva
@ 2018-06-29 0:01 ` Patchwork
2018-06-29 6:30 ` ✓ Fi.CI.IGT: " Patchwork
2018-06-29 8:23 ` [PATCH] drm/i915: Mark expected switch fall-throughs Jani Nikula
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-06-29 0:01 UTC (permalink / raw)
To: Gustavo A. R. Silva; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Mark expected switch fall-throughs (rev2)
URL : https://patchwork.freedesktop.org/series/34495/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4402 -> Patchwork_9479 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/34495/revisions/2/mbox/
== Known issues ==
Here are the changes found in Patchwork_9479 that come from known issues:
=== IGT changes ===
==== Possible fixes ====
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
fi-snb-2520m: INCOMPLETE (fdo#103713) -> PASS
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-bxt-dsi: INCOMPLETE (fdo#103927) -> PASS
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
== Participating hosts (43 -> 39) ==
Missing (4): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4402 -> Patchwork_9479
CI_DRM_4402: 5897aa5f98a6519589af4ef97ef7e599209f91ad @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4531: a14bc8b4d69eaca189665de505e6b10cbfbb7730 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9479: 9ad59d273eee3cdf6a8bc0275523782d3f6cea5f @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
9ad59d273eee drm/i915: Mark expected switch fall-throughs
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9479/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: Mark expected switch fall-throughs (rev2)
2018-06-28 22:35 [PATCH] drm/i915: Mark expected switch fall-throughs Gustavo A. R. Silva
2018-06-29 0:01 ` ✓ Fi.CI.BAT: success for drm/i915: Mark expected switch fall-throughs (rev2) Patchwork
@ 2018-06-29 6:30 ` Patchwork
2018-06-29 8:23 ` [PATCH] drm/i915: Mark expected switch fall-throughs Jani Nikula
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2018-06-29 6:30 UTC (permalink / raw)
To: Gustavo A. R. Silva; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Mark expected switch fall-throughs (rev2)
URL : https://patchwork.freedesktop.org/series/34495/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4402_full -> Patchwork_9479_full =
== Summary - WARNING ==
Minor unknown changes coming with Patchwork_9479_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9479_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9479_full:
=== IGT changes ===
==== Warnings ====
igt@pm_rc6_residency@rc6-accuracy:
shard-kbl: SKIP -> PASS
== Known issues ==
Here are the changes found in Patchwork_9479_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_selftest@live_gtt:
shard-glk: PASS -> INCOMPLETE (k.org#198133, fdo#103359)
igt@drv_suspend@shrink:
shard-snb: PASS -> FAIL (fdo#106886)
igt@kms_flip@flip-vs-expired-vblank:
shard-glk: PASS -> FAIL (fdo#105189)
igt@kms_flip@flip-vs-expired-vblank-interruptible:
shard-glk: PASS -> FAIL (fdo#102887)
igt@kms_flip@flip-vs-panning-vs-hang-interruptible:
shard-snb: PASS -> DMESG-WARN (fdo#103821)
igt@kms_flip_tiling@flip-x-tiled:
shard-glk: PASS -> FAIL (fdo#103822, fdo#104724)
igt@kms_vblank@pipe-a-accuracy-idle:
shard-glk: PASS -> FAIL (fdo#102583)
==== Possible fixes ====
igt@kms_flip@plain-flip-fb-recreate:
shard-glk: FAIL (fdo#100368) -> PASS
igt@kms_flip_tiling@flip-to-y-tiled:
shard-glk: FAIL (fdo#103822, fdo#104724) -> PASS +1
igt@kms_flip_tiling@flip-y-tiled:
shard-glk: FAIL (fdo#104724) -> PASS
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102583 https://bugs.freedesktop.org/show_bug.cgi?id=102583
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
fdo#103821 https://bugs.freedesktop.org/show_bug.cgi?id=103821
fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822
fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
fdo#105189 https://bugs.freedesktop.org/show_bug.cgi?id=105189
fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886
k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133
== Participating hosts (5 -> 5) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4402 -> Patchwork_9479
CI_DRM_4402: 5897aa5f98a6519589af4ef97ef7e599209f91ad @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4531: a14bc8b4d69eaca189665de505e6b10cbfbb7730 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9479: 9ad59d273eee3cdf6a8bc0275523782d3f6cea5f @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9479/shards.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Mark expected switch fall-throughs
2018-06-28 22:35 [PATCH] drm/i915: Mark expected switch fall-throughs Gustavo A. R. Silva
2018-06-29 0:01 ` ✓ Fi.CI.BAT: success for drm/i915: Mark expected switch fall-throughs (rev2) Patchwork
2018-06-29 6:30 ` ✓ Fi.CI.IGT: " Patchwork
@ 2018-06-29 8:23 ` Jani Nikula
2018-07-05 13:43 ` Jani Nikula
2 siblings, 1 reply; 6+ messages in thread
From: Jani Nikula @ 2018-06-29 8:23 UTC (permalink / raw)
To: Joonas Lahtinen, Rodrigo Vivi, David Airlie
Cc: intel-gfx, linux-kernel, dri-devel, Gustavo A. R. Silva
On Thu, 28 Jun 2018, "Gustavo A. R. Silva" <gustavo@embeddedor.com> wrote:
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Addresses-Coverity-ID: 141432
> Addresses-Coverity-ID: 141433
> Addresses-Coverity-ID: 141434
> Addresses-Coverity-ID: 141435
> Addresses-Coverity-ID: 141436
> Addresses-Coverity-ID: 1357360
> Addresses-Coverity-ID: 1357403
> Addresses-Coverity-ID: 1357433
> Addresses-Coverity-ID: 1392622
> Addresses-Coverity-ID: 1415273
> Addresses-Coverity-ID: 1435752
> Addresses-Coverity-ID: 1441500
> Addresses-Coverity-ID: 1454596
> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
I'll let others chime in before merging.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/i915_gem.c | 1 +
> drivers/gpu/drm/i915/i915_gem_stolen.c | 1 +
> drivers/gpu/drm/i915/intel_cdclk.c | 5 +++++
> drivers/gpu/drm/i915/intel_ddi.c | 1 +
> drivers/gpu/drm/i915/intel_display.c | 2 ++
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 3 +++
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> drivers/gpu/drm/i915/intel_engine_cs.c | 1 +
> drivers/gpu/drm/i915/intel_runtime_pm.c | 1 +
> drivers/gpu/drm/i915/intel_sdvo.c | 6 ++++++
> 10 files changed, 22 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 4cb720b..ed7bb24 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2114,6 +2114,7 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf)
> */
> if (!i915_terminally_wedged(&dev_priv->gpu_error))
> return VM_FAULT_SIGBUS;
> + /* else: fall through */
> case -EAGAIN:
> /*
> * EAGAIN means the gpu is hung and we'll wait for the error
> diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
> index 79a34729..055f868 100644
> --- a/drivers/gpu/drm/i915/i915_gem_stolen.c
> +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
> @@ -254,6 +254,7 @@ static void vlv_get_stolen_reserved(struct drm_i915_private *dev_priv,
> switch (reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK) {
> default:
> MISSING_CASE(reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);
> + /* fall through */
> case GEN7_STOLEN_RESERVED_1M:
> *size = 1024 * 1024;
> break;
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
> index bf9433d..29075c7 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -316,6 +316,7 @@ static void pnv_get_cdclk(struct drm_i915_private *dev_priv,
> break;
> default:
> DRM_ERROR("Unknown pnv display core clock 0x%04x\n", gcfgc);
> + /* fall through */
> case GC_DISPLAY_CLOCK_133_MHZ_PNV:
> cdclk_state->cdclk = 133333;
> break;
> @@ -1797,6 +1798,7 @@ static int icl_calc_cdclk(int min_cdclk, unsigned int ref)
> switch (ref) {
> default:
> MISSING_CASE(ref);
> + /* fall through */
> case 24000:
> ranges = ranges_24;
> break;
> @@ -1824,6 +1826,7 @@ static int icl_calc_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk)
> switch (cdclk) {
> default:
> MISSING_CASE(cdclk);
> + /* fall through */
> case 307200:
> case 556800:
> case 652800:
> @@ -1896,6 +1899,7 @@ static u8 icl_calc_voltage_level(int cdclk)
> return 1;
> default:
> MISSING_CASE(cdclk);
> + /* fall through */
> case 652800:
> case 648000:
> return 2;
> @@ -1913,6 +1917,7 @@ static void icl_get_cdclk(struct drm_i915_private *dev_priv,
> switch (val & ICL_DSSM_CDCLK_PLL_REFCLK_MASK) {
> default:
> MISSING_CASE(val);
> + /* fall through */
> case ICL_DSSM_CDCLK_PLL_REFCLK_24MHz:
> cdclk_state->ref = 24000;
> break;
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 0319825..c74b01a 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1069,6 +1069,7 @@ static uint32_t icl_pll_to_ddi_pll_sel(struct intel_encoder *encoder,
> switch (id) {
> default:
> MISSING_CASE(id);
> + /* fall through */
> case DPLL_ID_ICL_DPLL0:
> case DPLL_ID_ICL_DPLL1:
> return DDI_CLK_SEL_NONE;
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index eaa0663..d3f2cf6 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9359,6 +9359,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
> switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
> default:
> WARN(1, "unknown pipe linked to edp transcoder\n");
> + /* fall through */
> case TRANS_DDI_EDP_INPUT_A_ONOFF:
> case TRANS_DDI_EDP_INPUT_A_ON:
> trans_edp_pipe = PIPE_A;
> @@ -11023,6 +11024,7 @@ static bool check_digital_port_conflicts(struct drm_atomic_state *state)
> case INTEL_OUTPUT_DDI:
> if (WARN_ON(!HAS_DDI(to_i915(dev))))
> break;
> + /* else: fall through */
> case INTEL_OUTPUT_DP:
> case INTEL_OUTPUT_HDMI:
> case INTEL_OUTPUT_EDP:
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index 5734236..058696b 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -2566,6 +2566,7 @@ int icl_calc_dp_combo_pll_link(struct drm_i915_private *dev_priv,
> switch (index) {
> default:
> MISSING_CASE(index);
> + /* fall through */
> case 0:
> link_clock = 540000;
> break;
> @@ -2639,6 +2640,7 @@ static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc,
> switch (div1) {
> default:
> MISSING_CASE(div1);
> + /* fall through */
> case 2:
> hsdiv = 0;
> break;
> @@ -2903,6 +2905,7 @@ static i915_reg_t icl_pll_id_to_enable_reg(enum intel_dpll_id id)
> switch (id) {
> default:
> MISSING_CASE(id);
> + /* fall through */
> case DPLL_ID_ICL_DPLL0:
> case DPLL_ID_ICL_DPLL1:
> return CNL_DPLL_ENABLE(id);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index a6ff260..3cb6e87 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1254,6 +1254,7 @@ enc_to_dig_port(struct drm_encoder *encoder)
> switch (intel_encoder->type) {
> case INTEL_OUTPUT_DDI:
> WARN_ON(!HAS_DDI(to_i915(encoder->dev)));
> + /* fall through */
> case INTEL_OUTPUT_DP:
> case INTEL_OUTPUT_EDP:
> case INTEL_OUTPUT_HDMI:
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index d3264bd..d2ed44d 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -230,6 +230,7 @@ __intel_engine_context_size(struct drm_i915_private *dev_priv, u8 class)
> break;
> default:
> MISSING_CASE(class);
> + /* fall through */
> case VIDEO_DECODE_CLASS:
> case VIDEO_ENHANCEMENT_CLASS:
> case COPY_ENGINE_CLASS:
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index d81b2cf..6b5aa3b 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -3212,6 +3212,7 @@ static void cnl_set_procmon_ref_values(struct drm_i915_private *dev_priv,
> switch (val & (PROCESS_INFO_MASK | VOLTAGE_INFO_MASK)) {
> default:
> MISSING_CASE(val);
> + /* fall through */
> case VOLTAGE_INFO_0_85V | PROCESS_INFO_DOT_0:
> procmon = &cnl_procmon_values[PROCMON_0_85V_DOT_0];
> break;
> diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
> index e6a64b3..a7f4a56 100644
> --- a/drivers/gpu/drm/i915/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/intel_sdvo.c
> @@ -1340,6 +1340,7 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
> switch (crtc_state->pixel_multiplier) {
> default:
> WARN(1, "unknown pixel multiplier specified\n");
> + /* fall through */
> case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
> case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
> case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
> @@ -2316,14 +2317,19 @@ intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
> switch (sdvo->controlled_output) {
> case SDVO_OUTPUT_LVDS1:
> mask |= SDVO_OUTPUT_LVDS1;
> + /* fall through */
> case SDVO_OUTPUT_LVDS0:
> mask |= SDVO_OUTPUT_LVDS0;
> + /* fall through */
> case SDVO_OUTPUT_TMDS1:
> mask |= SDVO_OUTPUT_TMDS1;
> + /* fall through */
> case SDVO_OUTPUT_TMDS0:
> mask |= SDVO_OUTPUT_TMDS0;
> + /* fall through */
> case SDVO_OUTPUT_RGB1:
> mask |= SDVO_OUTPUT_RGB1;
> + /* fall through */
> case SDVO_OUTPUT_RGB0:
> mask |= SDVO_OUTPUT_RGB0;
> break;
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Mark expected switch fall-throughs
2018-06-29 8:23 ` [PATCH] drm/i915: Mark expected switch fall-throughs Jani Nikula
@ 2018-07-05 13:43 ` Jani Nikula
2018-07-05 13:48 ` Gustavo A. R. Silva
0 siblings, 1 reply; 6+ messages in thread
From: Jani Nikula @ 2018-07-05 13:43 UTC (permalink / raw)
To: Joonas Lahtinen, Rodrigo Vivi, David Airlie
Cc: intel-gfx, linux-kernel, dri-devel, Gustavo A. R. Silva
On Fri, 29 Jun 2018, Jani Nikula <jani.nikula@linux.intel.com> wrote:
> On Thu, 28 Jun 2018, "Gustavo A. R. Silva" <gustavo@embeddedor.com> wrote:
>> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
>> where we are expecting to fall through.
>>
>> Addresses-Coverity-ID: 141432
>> Addresses-Coverity-ID: 141433
>> Addresses-Coverity-ID: 141434
>> Addresses-Coverity-ID: 141435
>> Addresses-Coverity-ID: 141436
>> Addresses-Coverity-ID: 1357360
>> Addresses-Coverity-ID: 1357403
>> Addresses-Coverity-ID: 1357433
>> Addresses-Coverity-ID: 1392622
>> Addresses-Coverity-ID: 1415273
>> Addresses-Coverity-ID: 1435752
>> Addresses-Coverity-ID: 1441500
>> Addresses-Coverity-ID: 1454596
>> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
>
> Acked-by: Jani Nikula <jani.nikula@intel.com>
>
> I'll let others chime in before merging.
Pushed to drm-intel-next-queued, headed for v4.19, thanks for the patch.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915: Mark expected switch fall-throughs
2018-07-05 13:43 ` Jani Nikula
@ 2018-07-05 13:48 ` Gustavo A. R. Silva
0 siblings, 0 replies; 6+ messages in thread
From: Gustavo A. R. Silva @ 2018-07-05 13:48 UTC (permalink / raw)
To: Jani Nikula, Joonas Lahtinen, Rodrigo Vivi, David Airlie
Cc: intel-gfx, linux-kernel, dri-devel
On 07/05/2018 08:43 AM, Jani Nikula wrote:
> On Fri, 29 Jun 2018, Jani Nikula <jani.nikula@linux.intel.com> wrote:
>> On Thu, 28 Jun 2018, "Gustavo A. R. Silva" <gustavo@embeddedor.com> wrote:
>>> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
>>> where we are expecting to fall through.
>>>
>>> Addresses-Coverity-ID: 141432
>>> Addresses-Coverity-ID: 141433
>>> Addresses-Coverity-ID: 141434
>>> Addresses-Coverity-ID: 141435
>>> Addresses-Coverity-ID: 141436
>>> Addresses-Coverity-ID: 1357360
>>> Addresses-Coverity-ID: 1357403
>>> Addresses-Coverity-ID: 1357433
>>> Addresses-Coverity-ID: 1392622
>>> Addresses-Coverity-ID: 1415273
>>> Addresses-Coverity-ID: 1435752
>>> Addresses-Coverity-ID: 1441500
>>> Addresses-Coverity-ID: 1454596
>>> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
>>
>> Acked-by: Jani Nikula <jani.nikula@intel.com>
>>
>> I'll let others chime in before merging.
>
> Pushed to drm-intel-next-queued, headed for v4.19, thanks for the patch.
>
Great. :)
Thanks, Jani.
--
Gustavo
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-07-05 14:11 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-06-28 22:35 [PATCH] drm/i915: Mark expected switch fall-throughs Gustavo A. R. Silva
2018-06-29 0:01 ` ✓ Fi.CI.BAT: success for drm/i915: Mark expected switch fall-throughs (rev2) Patchwork
2018-06-29 6:30 ` ✓ Fi.CI.IGT: " Patchwork
2018-06-29 8:23 ` [PATCH] drm/i915: Mark expected switch fall-throughs Jani Nikula
2018-07-05 13:43 ` Jani Nikula
2018-07-05 13:48 ` Gustavo A. R. Silva
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).