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From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Chauhan, Madhav" <madhav.chauhan@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.IGT: failure for ICELAKE DSI DRIVER (rev4)
Date: Fri, 06 Jul 2018 08:14:41 -0000	[thread overview]
Message-ID: <20180706081441.22156.71452@emeril.freedesktop.org> (raw)
In-Reply-To: <1530798591-2077-1-git-send-email-madhav.chauhan@intel.com>

== Series Details ==

Series: ICELAKE DSI DRIVER (rev4)
URL   : https://patchwork.freedesktop.org/series/44823/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4438_full -> Patchwork_9549_full =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_9549_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_9549_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9549_full:

  === IGT changes ===

    ==== Possible regressions ====

    igt@kms_flip_tiling@flip-y-tiled:
      shard-glk:          PASS -> FAIL

    
    ==== Warnings ====

    igt@gem_exec_schedule@deep-blt:
      shard-kbl:          PASS -> SKIP

    
== Known issues ==

  Here are the changes found in Patchwork_9549_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_flip@2x-flip-vs-expired-vblank:
      shard-glk:          PASS -> FAIL (fdo#105363)

    igt@kms_flip@plain-flip-ts-check-interruptible:
      shard-glk:          PASS -> FAIL (fdo#100368)

    igt@kms_setmode@basic:
      shard-apl:          PASS -> FAIL (fdo#99912)

    
    ==== Possible fixes ====

    igt@drv_selftest@live_gtt:
      shard-kbl:          INCOMPLETE (fdo#107127, fdo#103665) -> PASS
      shard-apl:          FAIL (fdo#105347, fdo#107127) -> PASS

    igt@kms_setmode@basic:
      shard-kbl:          FAIL (fdo#99912) -> PASS

    
    ==== Warnings ====

    igt@drv_selftest@live_gtt:
      shard-glk:          FAIL (fdo#105347, fdo#107127) -> INCOMPLETE (k.org#198133, fdo#107127, fdo#103359)

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#103359 https://bugs.freedesktop.org/show_bug.cgi?id=103359
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#107127 https://bugs.freedesktop.org/show_bug.cgi?id=107127
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
  k.org#198133 https://bugzilla.kernel.org/show_bug.cgi?id=198133


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4438 -> Patchwork_9549

  CI_DRM_4438: b689733af687b4b8072fb62a6bfe267c4e888f5f @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4539: 8b3cc74c6911e9b2835fe6e160f84bae463a70ef @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9549: c13ca194f9ffc7b790530df0d8f9964222037bca @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9549/shards.html
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  parent reply	other threads:[~2018-07-06  8:14 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-05 13:49 [PATCH v4 00/20] ICELAKE DSI DRIVER Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 01/20] drm/i915/icl: Define register for DSI PLL Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 02/20] drm/i915/icl: Program DSI Escape clock Divider Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 03/20] drm/i915/icl: Define DSI mode ctl register Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 04/20] drm/i915/icl: Enable DSI IO power Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 05/20] drm/i915/icl: Define PORT_CL_DW_10 register Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 06/20] drm/i915/icl: Power down unused DSI lanes Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 07/20] drm/i915/icl: Define AUX lane registers for Port A/B Madhav Chauhan
2018-07-06  9:16   ` Jani Nikula
2018-07-05 13:49 ` [PATCH v4 08/20] drm/i915/icl: Configure lane sequencing of combo phy transmitter Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 09/20] drm/i915/icl: DSI vswing programming sequence Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 10/20] drm/i915/icl: Enable DDI Buffer Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 11/20] drm/i915/icl: Define T_INIT_MASTER registers Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 12/20] drm/i915/icl: Program " Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 13/20] drm/i915/icl: Define data/clock lanes dphy timing registers Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 14/20] drm/i915/icl: Program DSI clock and data lane timing params Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 15/20] drm/i915/icl: Define TA_TIMING_PARAM registers Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 16/20] drm/i915/icl: Program " Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 17/20] drm/i915/icl: Get DSI transcoder for a given port Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 18/20] drm/i915/icl: Add macros for MMIO of DSI transcoder registers Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 19/20] drm/i915/icl: Define TRANS_DSI_FUNC_CONF register Madhav Chauhan
2018-07-05 13:49 ` [PATCH v4 20/20] drm/i915/icl: Configure DSI transcoders Madhav Chauhan
2018-07-05 14:58 ` ✗ Fi.CI.CHECKPATCH: warning for ICELAKE DSI DRIVER (rev4) Patchwork
2018-07-05 15:05 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-07-05 15:20 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-07-05 20:30 ` ✓ Fi.CI.BAT: success " Patchwork
2018-07-06  8:10 ` Patchwork
2018-07-06  8:14 ` Patchwork [this message]
2018-07-06 22:22 ` ✓ Fi.CI.IGT: " Patchwork

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