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* [PATCH] drm/i915: Flush the WCB following a WC write
@ 2018-07-06 11:54 Chris Wilson
  2018-07-06 12:07 ` Matthew Auld
                   ` (5 more replies)
  0 siblings, 6 replies; 7+ messages in thread
From: Chris Wilson @ 2018-07-06 11:54 UTC (permalink / raw)
  To: intel-gfx; +Cc: matthew.auld

If we have just completed a WC write, we must ensure that the WCB (Write
Combining Buffer) is flushed out to main memory before we can expect to
see the results. This is especially important when mixing WC with GTT as
the physical paths are different and cachelines are not naturally flushed.

Testcase: igt/drv_selftests/live_coherency #gdg
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_gem.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0c0a1a959d0b..be63e8bbb6d2 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -837,6 +837,10 @@ flush_write_domain(struct drm_i915_gem_object *obj, unsigned int flush_domains)
 		}
 		break;
 
+	case I915_GEM_DOMAIN_WC:
+		wmb();
+		break;
+
 	case I915_GEM_DOMAIN_CPU:
 		i915_gem_clflush_object(obj, I915_CLFLUSH_SYNC);
 		break;
-- 
2.18.0

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^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH] drm/i915: Flush the WCB following a WC write
  2018-07-06 11:54 [PATCH] drm/i915: Flush the WCB following a WC write Chris Wilson
@ 2018-07-06 12:07 ` Matthew Auld
  2018-07-06 12:32 ` Tvrtko Ursulin
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 7+ messages in thread
From: Matthew Auld @ 2018-07-06 12:07 UTC (permalink / raw)
  To: Chris Wilson; +Cc: Intel Graphics Development, Matthew Auld

On 6 July 2018 at 12:54, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> If we have just completed a WC write, we must ensure that the WCB (Write
> Combining Buffer) is flushed out to main memory before we can expect to
> see the results. This is especially important when mixing WC with GTT as
> the physical paths are different and cachelines are not naturally flushed.
>
> Testcase: igt/drv_selftests/live_coherency #gdg
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
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^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] drm/i915: Flush the WCB following a WC write
  2018-07-06 11:54 [PATCH] drm/i915: Flush the WCB following a WC write Chris Wilson
  2018-07-06 12:07 ` Matthew Auld
@ 2018-07-06 12:32 ` Tvrtko Ursulin
  2018-07-06 12:44 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
                   ` (3 subsequent siblings)
  5 siblings, 0 replies; 7+ messages in thread
From: Tvrtko Ursulin @ 2018-07-06 12:32 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx; +Cc: matthew.auld


On 06/07/2018 12:54, Chris Wilson wrote:
> If we have just completed a WC write, we must ensure that the WCB (Write
> Combining Buffer) is flushed out to main memory before we can expect to
> see the results. This is especially important when mixing WC with GTT as
> the physical paths are different and cachelines are not naturally flushed.
> 
> Testcase: igt/drv_selftests/live_coherency #gdg
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>   drivers/gpu/drm/i915/i915_gem.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 0c0a1a959d0b..be63e8bbb6d2 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -837,6 +837,10 @@ flush_write_domain(struct drm_i915_gem_object *obj, unsigned int flush_domains)
>   		}
>   		break;
>   
> +	case I915_GEM_DOMAIN_WC:
> +		wmb();
> +		break;
> +
>   	case I915_GEM_DOMAIN_CPU:
>   		i915_gem_clflush_object(obj, I915_CLFLUSH_SYNC);
>   		break;
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
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^ permalink raw reply	[flat|nested] 7+ messages in thread

* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Flush the WCB following a WC write
  2018-07-06 11:54 [PATCH] drm/i915: Flush the WCB following a WC write Chris Wilson
  2018-07-06 12:07 ` Matthew Auld
  2018-07-06 12:32 ` Tvrtko Ursulin
@ 2018-07-06 12:44 ` Patchwork
  2018-07-06 13:00 ` ✓ Fi.CI.BAT: success " Patchwork
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-07-06 12:44 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Flush the WCB following a WC write
URL   : https://patchwork.freedesktop.org/series/46070/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
1442df0746fe drm/i915: Flush the WCB following a WC write
-:25: WARNING:MEMORY_BARRIER: memory barrier without comment
#25: FILE: drivers/gpu/drm/i915/i915_gem.c:841:
+		wmb();

total: 0 errors, 1 warnings, 0 checks, 10 lines checked

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^ permalink raw reply	[flat|nested] 7+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915: Flush the WCB following a WC write
  2018-07-06 11:54 [PATCH] drm/i915: Flush the WCB following a WC write Chris Wilson
                   ` (2 preceding siblings ...)
  2018-07-06 12:44 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2018-07-06 13:00 ` Patchwork
  2018-07-06 16:52 ` [PATCH] " Rodrigo Vivi
  2018-07-07  5:20 ` ✗ Fi.CI.IGT: failure for " Patchwork
  5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-07-06 13:00 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Flush the WCB following a WC write
URL   : https://patchwork.freedesktop.org/series/46070/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4444 -> Patchwork_9566 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/46070/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9566:

  === IGT changes ===

    ==== Warnings ====

    igt@gem_exec_suspend@basic-s4-devices:
      {fi-kbl-8809g}:     INCOMPLETE -> DMESG-WARN

    
== Known issues ==

  Here are the changes found in Patchwork_9566 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_frontbuffer_tracking@basic:
      fi-hsw-peppy:       PASS -> DMESG-FAIL (fdo#102614, fdo#106103)

    
    ==== Possible fixes ====

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      fi-bxt-dsi:         INCOMPLETE (fdo#103927) -> PASS

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
  fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927
  fdo#106103 https://bugs.freedesktop.org/show_bug.cgi?id=106103


== Participating hosts (47 -> 42) ==

  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4444 -> Patchwork_9566

  CI_DRM_4444: b153ce72348cbf6639dc5bd8e5e1bb0c180e9b86 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4540: 78071c2fa53db2f04b8eddc6e6118be4fbc5c2fe @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9566: 1442df0746feea3a7b77ee05f010c728b012d782 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

1442df0746fe drm/i915: Flush the WCB following a WC write

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9566/issues.html
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] drm/i915: Flush the WCB following a WC write
  2018-07-06 11:54 [PATCH] drm/i915: Flush the WCB following a WC write Chris Wilson
                   ` (3 preceding siblings ...)
  2018-07-06 13:00 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2018-07-06 16:52 ` Rodrigo Vivi
  2018-07-07  5:20 ` ✗ Fi.CI.IGT: failure for " Patchwork
  5 siblings, 0 replies; 7+ messages in thread
From: Rodrigo Vivi @ 2018-07-06 16:52 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx, matthew.auld

On Fri, Jul 06, 2018 at 12:54:02PM +0100, Chris Wilson wrote:
> If we have just completed a WC write, we must ensure that the WCB (Write
> Combining Buffer) is flushed out to main memory before we can expect to
> see the results. This is especially important when mixing WC with GTT as
> the physical paths are different and cachelines are not naturally flushed.
> 
> Testcase: igt/drv_selftests/live_coherency #gdg
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_gem.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 0c0a1a959d0b..be63e8bbb6d2 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -837,6 +837,10 @@ flush_write_domain(struct drm_i915_gem_object *obj, unsigned int flush_domains)
>  		}
>  		break;
>  
> +	case I915_GEM_DOMAIN_WC:
> +		wmb();
> +		break;
> +
>  	case I915_GEM_DOMAIN_CPU:
>  		i915_gem_clflush_object(obj, I915_CLFLUSH_SYNC);
>  		break;
> -- 
> 2.18.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 7+ messages in thread

* ✗ Fi.CI.IGT: failure for drm/i915: Flush the WCB following a WC write
  2018-07-06 11:54 [PATCH] drm/i915: Flush the WCB following a WC write Chris Wilson
                   ` (4 preceding siblings ...)
  2018-07-06 16:52 ` [PATCH] " Rodrigo Vivi
@ 2018-07-07  5:20 ` Patchwork
  5 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2018-07-07  5:20 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Flush the WCB following a WC write
URL   : https://patchwork.freedesktop.org/series/46070/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4444_full -> Patchwork_9566_full =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_9566_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_9566_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9566_full:

  === IGT changes ===

    ==== Possible regressions ====

    igt@kms_flip_tiling@flip-x-tiled:
      shard-glk:          PASS -> FAIL

    
    ==== Warnings ====

    igt@gem_exec_schedule@deep-bsd2:
      shard-kbl:          PASS -> SKIP

    igt@gem_exec_schedule@deep-vebox:
      shard-kbl:          SKIP -> PASS +3

    
== Known issues ==

  Here are the changes found in Patchwork_9566_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_selftest@live_gtt:
      shard-kbl:          PASS -> INCOMPLETE (fdo#107127, fdo#103665)

    igt@kms_flip@flip-vs-expired-vblank:
      shard-glk:          PASS -> FAIL (fdo#105363)

    
    ==== Possible fixes ====

    igt@drv_selftest@live_gtt:
      shard-glk:          FAIL (fdo#107127, fdo#105347) -> PASS

    igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
      shard-glk:          FAIL (fdo#106509, fdo#105454) -> PASS

    igt@kms_flip@2x-flip-vs-expired-vblank:
      shard-glk:          FAIL (fdo#105363) -> PASS

    
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454
  fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509
  fdo#107127 https://bugs.freedesktop.org/show_bug.cgi?id=107127


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4444 -> Patchwork_9566

  CI_DRM_4444: b153ce72348cbf6639dc5bd8e5e1bb0c180e9b86 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4540: 78071c2fa53db2f04b8eddc6e6118be4fbc5c2fe @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9566: 1442df0746feea3a7b77ee05f010c728b012d782 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9566/shards.html
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^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2018-07-07  5:20 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-07-06 11:54 [PATCH] drm/i915: Flush the WCB following a WC write Chris Wilson
2018-07-06 12:07 ` Matthew Auld
2018-07-06 12:32 ` Tvrtko Ursulin
2018-07-06 12:44 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2018-07-06 13:00 ` ✓ Fi.CI.BAT: success " Patchwork
2018-07-06 16:52 ` [PATCH] " Rodrigo Vivi
2018-07-07  5:20 ` ✗ Fi.CI.IGT: failure for " Patchwork

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