From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915/selftests: Fixup missing MI_MEM_VIRTUAL for live_hangcheck
Date: Fri, 6 Jul 2018 17:47:43 +0300 [thread overview]
Message-ID: <20180706144743.GM5565@intel.com> (raw)
In-Reply-To: <20180706142323.25699-2-chris@chris-wilson.co.uk>
On Fri, Jul 06, 2018 at 03:23:23PM +0100, Chris Wilson wrote:
> We always want to use a virtual address (i.e. use the GTT) for
> MI_STORE_DWORD_IMM, but forgot the ever so important flag in
> live_hangcheck for gen3.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> index 0fc6da81f86e..c838f7d08cb9 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> @@ -184,7 +184,7 @@ static int emit_recurse_batch(struct hang *h,
> *batch++ = MI_BATCH_BUFFER_START | 2 << 6;
> *batch++ = lower_32_bits(vma->node.start);
> } else {
> - *batch++ = MI_STORE_DWORD_IMM;
> + *batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL;
> *batch++ = lower_32_bits(hws_address(hws, rq));
> *batch++ = rq->fence.seqno;
> *batch++ = MI_ARB_CHECK;
> --
> 2.18.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2018-07-06 14:47 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-06 14:23 [PATCH 1/2] drm/i915/selftests: Replace magic 1<<22 with MI_USE_GGTT/MI_MEM_VIRTUAL Chris Wilson
2018-07-06 14:23 ` [PATCH 2/2] drm/i915/selftests: Fixup missing MI_MEM_VIRTUAL for live_hangcheck Chris Wilson
2018-07-06 14:47 ` Ville Syrjälä [this message]
2018-07-06 14:47 ` [PATCH 1/2] drm/i915/selftests: Replace magic 1<<22 with MI_USE_GGTT/MI_MEM_VIRTUAL Ville Syrjälä
2018-07-06 14:53 ` Chris Wilson
2018-07-06 16:03 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2018-07-07 13:17 ` ✗ Fi.CI.IGT: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180706144743.GM5565@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=chris@chris-wilson.co.uk \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).