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From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/selftests: Adjust y-tiling height for older machines
Date: Fri, 6 Jul 2018 13:55:37 -0700	[thread overview]
Message-ID: <20180706205537.GF23473@intel.com> (raw)
In-Reply-To: <153090955416.7594.8039606601770210502@cwilso3-mobl.ger.corp.intel.com>

On Fri, Jul 06, 2018 at 09:39:14PM +0100, Chris Wilson wrote:
> Quoting Rodrigo Vivi (2018-07-06 21:27:52)
> > On Fri, Jul 06, 2018 at 06:15:37PM +0100, Chris Wilson wrote:
> > > Older machines do not have the 128-byte tile width format for
> > > I915_TILING_Y and so we must adapt our reference swizzle.
> > > 
> > > Testcase: igt/drv_selftest/live_objects #gdg
> > 
> > The change below itself makes sense to me, but I'm trying to understand
> > where this came from....
> 
> The result doesn't look right, so scrap it.
>  
> > Looking to https://intel-gfx-ci.01.org/tree/drm-tip/igt@drv_selftest@live_objects.html
> > is this related to issues on fi-gdg-551?
> 
> Would only apply to gdg in the farm.
>  
> > Or is this related to that APL bugzilla entry?

that flash of a moment when I wondered you could be actually targeting this:
https://bugs.freedesktop.org/show_bug.cgi?id=107113


> 
> Which?
>  
> > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > ---
> > >  drivers/gpu/drm/i915/selftests/i915_gem_object.c | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> > > index 6fe71865b710..8a35d2f70671 100644
> > > --- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> > > +++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> > > @@ -171,7 +171,7 @@ static u64 tiled_offset(const struct tile *tile, u64 v)
> > >               v += x;
> > >       } else {
> > >               const unsigned int ytile_span = 16;
> > 
> > could we also figure this value from somewhere else instead of
> > leaving it hardcoded for all platforms here?
> 
> The only place where manual detiling is used inside the kernel. And if
> we were, it would be a lot of specialised code, where obfuscation of
> magic macros is unlikely to help (careful handling of cachelines being
> at the forefront). Interesting question as to whether we do provide a
> bounce buffer mmap to replace GTT mmap? Just say no.
> -Chris
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  reply	other threads:[~2018-07-06 20:55 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-06 17:15 [PATCH] drm/i915/selftests: Adjust y-tiling height for older machines Chris Wilson
2018-07-06 17:52 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-07-06 20:27 ` [PATCH] " Rodrigo Vivi
2018-07-06 20:39   ` Chris Wilson
2018-07-06 20:55     ` Rodrigo Vivi [this message]
2018-07-06 20:59       ` Chris Wilson
2018-07-07 17:40 ` ✗ Fi.CI.IGT: failure for " Patchwork

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