From: "Jakub Bartmiński" <jakub.bartminski@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v4 1/5] drm/i915/guc: Avoid wasting memory on incorrect GuC pin bias
Date: Fri, 20 Jul 2018 15:33:51 +0200 [thread overview]
Message-ID: <20180720133355.26180-1-jakub.bartminski@intel.com> (raw)
It would appear that the calculated GuC pin bias was larger than it
should be, as the GuC address space does NOT contain the "HW contexts RSVD"
part of the WOPCM. Thus, the GuC pin bias is simply the GuC WOPCM size.
Signed-off-by: Jakub Bartmiński <jakub.bartminski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/i915/intel_guc.c | 50 ++++++++++++++------------------
1 file changed, 22 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index e12bd259df17..17753952933e 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -582,50 +582,44 @@ int intel_guc_resume(struct intel_guc *guc)
*
* ::
*
- * +==============> +====================+ <== GUC_GGTT_TOP
- * ^ | |
- * | | |
- * | | DRAM |
- * | | Memory |
- * | | |
- * GuC | |
- * Address +========> +====================+ <== WOPCM Top
- * Space ^ | HW contexts RSVD |
- * | | | WOPCM |
- * | | +==> +--------------------+ <== GuC WOPCM Top
- * | GuC ^ | |
- * | GGTT | | |
- * | Pin GuC | GuC |
- * | Bias WOPCM | WOPCM |
- * | | Size | |
- * | | | | |
- * v v v | |
- * +=====+=====+==> +====================+ <== GuC WOPCM Base
- * | Non-GuC WOPCM |
- * | (HuC/Reserved) |
- * +====================+ <== WOPCM Base
+ * +============> +====================+ <== GUC_GGTT_TOP
+ * ^ | |
+ * | | |
+ * | | DRAM |
+ * | | Memory |
+ * | | |
+ * GuC | |
+ * Address +====> +====================+ <== GuC WOPCM Top
+ * Space ^ | |
+ * | | | |
+ * | GuC | GuC |
+ * | WOPCM | WOPCM |
+ * | Size | |
+ * | | | |
+ * v v | |
+ * +=======+====> +====================+ <== GuC WOPCM Base
*
* The lower part of GuC Address Space [0, ggtt_pin_bias) is mapped to WOPCM
* while upper part of GuC Address Space [ggtt_pin_bias, GUC_GGTT_TOP) is mapped
- * to DRAM. The value of the GuC ggtt_pin_bias is determined by WOPCM size and
- * actual GuC WOPCM size.
+ * to DRAM. The value of the GuC ggtt_pin_bias is the GuC WOPCM size.
*/
/**
* guc_init_ggtt_pin_bias() - Initialize the GuC ggtt_pin_bias value.
* @guc: intel_guc structure.
*
- * This function will calculate and initialize the ggtt_pin_bias value based on
- * overall WOPCM size and GuC WOPCM size.
+ * This function will calculate and initialize the ggtt_pin_bias value
+ * based on the GuC WOPCM size.
*/
static void guc_init_ggtt_pin_bias(struct intel_guc *guc)
{
struct drm_i915_private *i915 = guc_to_i915(guc);
GEM_BUG_ON(!i915->wopcm.size);
- GEM_BUG_ON(i915->wopcm.size < i915->wopcm.guc.base);
+ GEM_BUG_ON(range_overflows(i915->wopcm.guc.base, i915->wopcm.guc.size,
+ i915->wopcm.size));
- guc->ggtt_pin_bias = i915->wopcm.size - i915->wopcm.guc.base;
+ guc->ggtt_pin_bias = i915->wopcm.guc.size;
}
/**
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next reply other threads:[~2018-07-20 13:34 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-20 13:33 Jakub Bartmiński [this message]
2018-07-20 13:33 ` [PATCH v4 2/5] drm/i915/guc: Move the pin bias value from GuC to GGTT Jakub Bartmiński
2018-07-20 13:33 ` [PATCH v4 3/5] drm/i915: Remove unnecessary ggtt_offset_bias from i915_gem_context Jakub Bartmiński
2018-07-20 13:33 ` [PATCH v4 4/5] drm/i915: Add a fault injection point to WOPCM init Jakub Bartmiński
2018-07-20 13:33 ` [PATCH v4 5/5] HAX enable GuC for CI Jakub Bartmiński
2018-07-20 13:46 ` ✗ Fi.CI.SPARSE: warning for series starting with [v4,1/5] drm/i915/guc: Avoid wasting memory on incorrect GuC pin bias Patchwork
2018-07-20 14:06 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-07-20 15:04 ` [PATCH v4 1/5] " Michał Winiarski
2018-07-24 18:25 ` Michal Wajdeczko
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180720133355.26180-1-jakub.bartminski@intel.com \
--to=jakub.bartminski@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).