From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915/psr: Limit psr2 to skl+
Date: Thu, 26 Jul 2018 16:56:18 -0700 [thread overview]
Message-ID: <20180726235617.GI21266@intel.com> (raw)
In-Reply-To: <1532587641.3356.109.camel@intel.com>
1;5202;0cOn Wed, Jul 25, 2018 at 11:47:21PM -0700, Dhinakaran Pandiyan wrote:
> On Thu, 2018-07-26 at 11:32 +0530, vathsala nagaraju wrote:
> > From: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
> >
> > PSR2 is supported from skl+.
> > So Limiting it to skl+.
>
> We restrict PSR2 to gen9+ in intel_psr_init_dpcd(), avoids a few extra
> dpcd reads by checking early.
>
>
> >
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > Signed-off-by: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_psr.c | 8 +++++---
> > 1 file changed, 5 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index 4bd5768..cbbdfd2 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -387,7 +387,7 @@ static void hsw_activate_psr1(struct intel_dp
> > *intel_dp)
> > I915_WRITE(EDP_PSR_CTL, val);
> > }
> >
> > -static void hsw_activate_psr2(struct intel_dp *intel_dp)
> > +static void skl_activate_psr2(struct intel_dp *intel_dp)
>
> Yeah, skl_ is appropriate here.
>
> We should also change the function names to hsw_psr1_activate() and
> skl_psr2_activate(), it has been annoying me that the activate
> functions aren't named in the same fashion as psr_{enable, invalidate,
> flush, disable}
maybe simply intel_psr1_activate intel_psr2_activate?!
>
>
> > {
> > struct intel_digital_port *dig_port =
> > dp_to_dig_port(intel_dp);
> > struct drm_device *dev = dig_port->base.base.dev;
> > @@ -516,7 +516,9 @@ void intel_psr_compute_config(struct intel_dp
> > *intel_dp,
> > }
> >
> > crtc_state->has_psr = true;
> > - crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp,
> > crtc_state);
> > + if (INTEL_GEN(dev_priv) >= 9)
> > + crtc_state->has_psr2 =
> > intel_psr2_config_valid(intel_dp,
> > + crtc_
> > state);
> > DRM_DEBUG_KMS("Enabling PSR%s\n", crtc_state->has_psr2 ? "2"
> > : "");
> > }
> >
> > @@ -534,7 +536,7 @@ static void intel_psr_activate(struct intel_dp
> > *intel_dp)
> >
> > /* psr1 and psr2 are mutually exclusive.*/
> > if (dev_priv->psr.psr2_enabled)
> > - hsw_activate_psr2(intel_dp);
> > + skl_activate_psr2(intel_dp);
> > else
> > hsw_activate_psr1(intel_dp);
> >
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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prev parent reply other threads:[~2018-07-26 23:56 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-26 6:02 [PATCH] drm/i915/psr: Limit psr2 to skl+ vathsala nagaraju
2018-07-26 6:32 ` ✗ Fi.CI.BAT: failure for " Patchwork
2018-07-26 6:47 ` [PATCH] " Dhinakaran Pandiyan
2018-07-26 23:56 ` Rodrigo Vivi [this message]
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