[PATCH 01/10] drm: Let userspace check if driver supports modeset

[PATCH 01/10] drm: Let userspace check if driver supports modeset

[José Roberto de Souza]

GPU accelerators usually don't have display block or the display
driver part can be disabled when building driver(for servers it saves
some resources) so it is important let userspace check this
capability too.

Right now we are checking
drmModeGetResources()/drm_mode_getresources() for a error to detect
if display is enabled but it is a hackish way it can fail for other
reasons too.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/drm_ioctl.c | 3 +++
 include/uapi/drm/drm.h      | 1 +
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index ea10e9a26aad..3a8438ae9b51 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -244,6 +244,9 @@ static int drm_getcap(struct drm_device *dev, void *data, struct drm_file *file_
 	case DRM_CAP_SYNCOBJ:
 		req->value = drm_core_check_feature(dev, DRIVER_SYNCOBJ);
 		return 0;
+	case DRM_CAP_MODESET:
+		req->value = drm_core_check_feature(dev, DRIVER_MODESET);
+		return 0;
 	}
 
 	/* Other caps only work with KMS drivers */
diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h
index 300f336633f2..85fae6ddbf48 100644
--- a/include/uapi/drm/drm.h
+++ b/include/uapi/drm/drm.h
@@ -649,6 +649,7 @@ struct drm_gem_open {
 #define DRM_CAP_PAGE_FLIP_TARGET	0x11
 #define DRM_CAP_CRTC_IN_VBLANK_EVENT	0x12
 #define DRM_CAP_SYNCOBJ		0x13
+#define DRM_CAP_MODESET		0x14
 
 /** DRM_IOCTL_GET_CAP ioctl argument type */
 struct drm_get_cap {
-- 
2.18.0

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[PATCH 02/10] drm/i915: Set PCH as NOP when display is disabled

[José Roberto de Souza]

num_pipes is set to 0 if disable_display is set inside
intel_device_info_runtime_init() but when that happen PCH will
already be set in intel_detect_pch().

i915_driver_load()
	i915_driver_init_early()
		...
		intel_detect_pch()
		...
	...
	i915_driver_init_hw()
		intel_device_info_runtime_init()

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 18a45e7a3d7c..62f34f8aa02b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -287,7 +287,8 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
 	 * Use PCH_NOP (PCH but no South Display) for PCH platforms without
 	 * display.
 	 */
-	if (pch && INTEL_INFO(dev_priv)->num_pipes == 0) {
+	if (pch && ((INTEL_INFO(dev_priv)->num_pipes == 0) ||
+		    i915_modparams.disable_display)) {
 		DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n");
 		dev_priv->pch_type = PCH_NOP;
 		dev_priv->pch_id = 0;
-- 
2.18.0

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[PATCH 03/10] drm/i915/runtime_pm: Share code to enable/disable PCH reset handshake

[José Roberto de Souza]

Instead of have the same code spread into 4 platforms lets share it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_runtime_pm.c | 29 ++++++++++++++-----------
 1 file changed, 16 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 6b5aa3b074ec..fb12df402d21 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3048,18 +3048,28 @@ static void icl_mbus_init(struct drm_i915_private *dev_priv)
 	I915_WRITE(MBUS_ABOX_CTL, val);
 }
 
+static void skl_pch_reset_handshake(struct drm_i915_private *dev_priv)
+{
+	u32 val = I915_READ(HSW_NDE_RSTWRN_OPT);
+
+	if (HAS_PCH_NOP(dev_priv))
+		val &= ~RESET_PCH_HANDSHAKE_ENABLE;
+	else
+		val |= RESET_PCH_HANDSHAKE_ENABLE;
+
+	I915_WRITE(HSW_NDE_RSTWRN_OPT, val);
+}
+
 static void skl_display_core_init(struct drm_i915_private *dev_priv,
 				   bool resume)
 {
 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
 	struct i915_power_well *well;
-	uint32_t val;
 
 	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
 
 	/* enable PCH reset handshake */
-	val = I915_READ(HSW_NDE_RSTWRN_OPT);
-	I915_WRITE(HSW_NDE_RSTWRN_OPT, val | RESET_PCH_HANDSHAKE_ENABLE);
+	skl_pch_reset_handshake(dev_priv);
 
 	/* enable PG1 and Misc I/O */
 	mutex_lock(&power_domains->lock);
@@ -3115,7 +3125,6 @@ void bxt_display_core_init(struct drm_i915_private *dev_priv,
 {
 	struct i915_power_domains *power_domains = &dev_priv->power_domains;
 	struct i915_power_well *well;
-	uint32_t val;
 
 	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
 
@@ -3125,9 +3134,7 @@ void bxt_display_core_init(struct drm_i915_private *dev_priv,
 	 * Move the handshake programming to initialization sequence.
 	 * Previously was left up to BIOS.
 	 */
-	val = I915_READ(HSW_NDE_RSTWRN_OPT);
-	val &= ~RESET_PCH_HANDSHAKE_ENABLE;
-	I915_WRITE(HSW_NDE_RSTWRN_OPT, val);
+	skl_pch_reset_handshake(dev_priv);
 
 	/* Enable PG1 */
 	mutex_lock(&power_domains->lock);
@@ -3248,9 +3255,7 @@ static void cnl_display_core_init(struct drm_i915_private *dev_priv, bool resume
 	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
 
 	/* 1. Enable PCH Reset Handshake */
-	val = I915_READ(HSW_NDE_RSTWRN_OPT);
-	val |= RESET_PCH_HANDSHAKE_ENABLE;
-	I915_WRITE(HSW_NDE_RSTWRN_OPT, val);
+	skl_pch_reset_handshake(dev_priv);
 
 	/* 2. Enable Comp */
 	val = I915_READ(CHICKEN_MISC_2);
@@ -3333,9 +3338,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
 	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
 
 	/* 1. Enable PCH reset handshake. */
-	val = I915_READ(HSW_NDE_RSTWRN_OPT);
-	val |= RESET_PCH_HANDSHAKE_ENABLE;
-	I915_WRITE(HSW_NDE_RSTWRN_OPT, val);
+	skl_pch_reset_handshake(dev_priv);
 
 	for (port = PORT_A; port <= PORT_B; port++) {
 		/* 2. Enable DDI combo PHY comp. */
-- 
2.18.0

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[PATCH 04/10] drm/i915: Move out non-display related calls from display/modeset init/cleanup

[José Roberto de Souza]

i915_load_modeset_init() and intel_modeset_cleanup() was initializing
and cleaning up things that is not display only.
This will make easy initialize driver without display block.

Also moving VLV/CHV/BYT czclk as it is a core clock used as base by
several other GPU blocks not only display, including gem/GT.
Spec: 14370

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c      | 86 ++++++++++++++++++----------
 drivers/gpu/drm/i915/i915_drv.h      |  1 +
 drivers/gpu/drm/i915/intel_display.c | 28 ++-------
 drivers/gpu/drm/i915/intel_pm.c      | 10 ++++
 4 files changed, 72 insertions(+), 53 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 62f34f8aa02b..3ca30b9f2096 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -665,28 +665,15 @@ static int i915_load_modeset_init(struct drm_device *dev)
 	if (ret)
 		goto cleanup_vga_client;
 
-	/* must happen before intel_power_domains_init_hw() on VLV/CHV */
-	intel_update_rawclk(dev_priv);
-
-	intel_power_domains_init_hw(dev_priv, false);
-
 	intel_csr_ucode_init(dev_priv);
 
-	ret = intel_irq_install(dev_priv);
-	if (ret)
-		goto cleanup_csr;
-
 	intel_setup_gmbus(dev_priv);
 
 	/* Important: The output setup functions called by modeset_init need
 	 * working irqs for e.g. gmbus and dp aux transfers. */
 	ret = intel_modeset_init(dev);
 	if (ret)
-		goto cleanup_irq;
-
-	ret = i915_gem_init(dev_priv);
-	if (ret)
-		goto cleanup_modeset;
+		goto cleanup_gmbus;
 
 	intel_setup_overlay(dev_priv);
 
@@ -695,25 +682,18 @@ static int i915_load_modeset_init(struct drm_device *dev)
 
 	ret = intel_fbdev_init(dev);
 	if (ret)
-		goto cleanup_gem;
+		goto cleanup_modeset;
 
 	/* Only enable hotplug handling once the fbdev is fully set up. */
 	intel_hpd_init(dev_priv);
 
 	return 0;
 
-cleanup_gem:
-	if (i915_gem_suspend(dev_priv))
-		DRM_ERROR("failed to idle hardware; continuing to unload!\n");
-	i915_gem_fini(dev_priv);
 cleanup_modeset:
 	intel_modeset_cleanup(dev);
-cleanup_irq:
-	drm_irq_uninstall(dev);
+cleanup_gmbus:
 	intel_teardown_gmbus(dev_priv);
-cleanup_csr:
 	intel_csr_ucode_fini(dev_priv);
-	intel_power_domains_fini(dev_priv);
 	vga_switcheroo_unregister_client(pdev);
 cleanup_vga_client:
 	vga_client_register(pdev, NULL, NULL, NULL);
@@ -1397,9 +1377,25 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 			goto out_cleanup_hw;
 	}
 
+	/* must happen before intel_power_domains_init_hw() on VLV/CHV */
+	intel_update_rawclk(dev_priv);
+
+	/* i915_gem_init() call chain will call
+	 * intel_display_power_put(i915, POWER_DOMAIN_GT_IRQ);
+	 */
+	intel_power_domains_init_hw(dev_priv, false);
+
+	ret = intel_irq_install(dev_priv);
+	if (ret)
+		goto out_cleanup_power;
+
+	ret = i915_gem_init(dev_priv);
+	if (ret)
+		goto cleanup_irq;
+
 	ret = i915_load_modeset_init(&dev_priv->drm);
 	if (ret < 0)
-		goto out_cleanup_hw;
+		goto cleanup_gem;
 
 	i915_driver_register(dev_priv);
 
@@ -1413,6 +1409,15 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 
 	return 0;
 
+cleanup_gem:
+	if (i915_gem_suspend(dev_priv))
+		DRM_ERROR("failed to idle hardware; continuing to unload!\n");
+	intel_cleanup_gt_powersave(dev_priv);
+	i915_gem_fini(dev_priv);
+cleanup_irq:
+	drm_irq_uninstall(&dev_priv->drm);
+out_cleanup_power:
+	intel_power_domains_fini(dev_priv);
 out_cleanup_hw:
 	i915_driver_cleanup_hw(dev_priv);
 out_cleanup_mmio:
@@ -1431,11 +1436,24 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 	return ret;
 }
 
-void i915_driver_unload(struct drm_device *dev)
+/* unload/cleanup the leftover of i915_load_modeset_init() */
+static void i915_modeset_unload(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	struct pci_dev *pdev = dev_priv->drm.pdev;
 
+	intel_bios_cleanup(dev_priv);
+
+	vga_switcheroo_unregister_client(pdev);
+	vga_client_register(pdev, NULL, NULL, NULL);
+
+	intel_csr_ucode_fini(dev_priv);
+}
+
+void i915_driver_unload(struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = to_i915(dev);
+
 	i915_driver_unregister(dev_priv);
 
 	if (i915_gem_suspend(dev_priv))
@@ -1447,14 +1465,22 @@ void i915_driver_unload(struct drm_device *dev)
 
 	intel_gvt_cleanup(dev_priv);
 
-	intel_modeset_cleanup(dev);
+	intel_modeset_cleanup_prepare(dev);
 
-	intel_bios_cleanup(dev_priv);
+	intel_disable_gt_powersave(dev_priv);
 
-	vga_switcheroo_unregister_client(pdev);
-	vga_client_register(pdev, NULL, NULL, NULL);
+	/*
+	 * Interrupts and polling as the first thing to avoid creating havoc.
+	 * Too much stuff here (turning of connectors, ...) would
+	 * experience fancy races otherwise.
+	 */
+	intel_irq_uninstall(dev_priv);
 
-	intel_csr_ucode_fini(dev_priv);
+	intel_modeset_cleanup(dev);
+
+	intel_cleanup_gt_powersave(dev_priv);
+
+	i915_modeset_unload(dev);
 
 	/* Free error state after interrupts are fully disabled. */
 	cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0f49f9988dfa..d50fd9825b10 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3411,6 +3411,7 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
 /* modesetting */
 extern void intel_modeset_init_hw(struct drm_device *dev);
 extern int intel_modeset_init(struct drm_device *dev);
+void intel_modeset_cleanup_prepare(struct drm_device *dev);
 extern void intel_modeset_cleanup(struct drm_device *dev);
 extern int intel_connector_register(struct drm_connector *);
 extern void intel_connector_unregister(struct drm_connector *);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 577b30dde45b..1b0ee796f697 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -218,17 +218,6 @@ int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv,
 				 dev_priv->hpll_freq);
 }
 
-static void intel_update_czclk(struct drm_i915_private *dev_priv)
-{
-	if (!(IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)))
-		return;
-
-	dev_priv->czclk_freq = vlv_get_cck_clock_hpll(dev_priv, "czclk",
-						      CCK_CZ_CLOCK_CONTROL);
-
-	DRM_DEBUG_DRIVER("CZ clock rate: %d kHz\n", dev_priv->czclk_freq);
-}
-
 static inline u32 /* units of 100MHz */
 intel_fdi_link_freq(struct drm_i915_private *dev_priv,
 		    const struct intel_crtc_state *pipe_config)
@@ -15247,7 +15236,6 @@ int intel_modeset_init(struct drm_device *dev)
 	intel_shared_dpll_init(dev);
 	intel_update_fdi_pll_freq(dev_priv);
 
-	intel_update_czclk(dev_priv);
 	intel_modeset_init_hw(dev);
 
 	if (dev_priv->max_cdclk_freq == 0)
@@ -15962,7 +15950,7 @@ static void intel_hpd_poll_fini(struct drm_device *dev)
 	drm_connector_list_iter_end(&conn_iter);
 }
 
-void intel_modeset_cleanup(struct drm_device *dev)
+void intel_modeset_cleanup_prepare(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = to_i915(dev);
 
@@ -15970,15 +15958,11 @@ void intel_modeset_cleanup(struct drm_device *dev)
 
 	flush_work(&dev_priv->atomic_helper.free_work);
 	WARN_ON(!llist_empty(&dev_priv->atomic_helper.free_list));
+}
 
-	intel_disable_gt_powersave(dev_priv);
-
-	/*
-	 * Interrupts and polling as the first thing to avoid creating havoc.
-	 * Too much stuff here (turning of connectors, ...) would
-	 * experience fancy races otherwise.
-	 */
-	intel_irq_uninstall(dev_priv);
+void intel_modeset_cleanup(struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = to_i915(dev);
 
 	/*
 	 * Due to the hpd irq storm handling the hotplug work can re-arm the
@@ -16000,8 +15984,6 @@ void intel_modeset_cleanup(struct drm_device *dev)
 
 	intel_cleanup_overlay(dev_priv);
 
-	intel_cleanup_gt_powersave(dev_priv);
-
 	intel_teardown_gmbus(dev_priv);
 
 	destroy_workqueue(dev_priv->modeset_wq);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 7312ecb73415..e54a65405448 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7365,6 +7365,14 @@ static void vlv_init_gpll_ref_freq(struct drm_i915_private *dev_priv)
 			 dev_priv->gt_pm.rps.gpll_ref_freq);
 }
 
+static void valleyview_update_czclk(struct drm_i915_private *dev_priv)
+{
+	dev_priv->czclk_freq = vlv_get_cck_clock_hpll(dev_priv, "czclk",
+						      CCK_CZ_CLOCK_CONTROL);
+
+	DRM_DEBUG_DRIVER("CZ clock rate: %d kHz\n", dev_priv->czclk_freq);
+}
+
 static void valleyview_init_gt_powersave(struct drm_i915_private *dev_priv)
 {
 	struct intel_rps *rps = &dev_priv->gt_pm.rps;
@@ -7372,6 +7380,7 @@ static void valleyview_init_gt_powersave(struct drm_i915_private *dev_priv)
 
 	valleyview_setup_pctx(dev_priv);
 
+	valleyview_update_czclk(dev_priv);
 	vlv_init_gpll_ref_freq(dev_priv);
 
 	val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
@@ -7418,6 +7427,7 @@ static void cherryview_init_gt_powersave(struct drm_i915_private *dev_priv)
 
 	cherryview_setup_pctx(dev_priv);
 
+	valleyview_update_czclk(dev_priv);
 	vlv_init_gpll_ref_freq(dev_priv);
 
 	mutex_lock(&dev_priv->sb_lock);
-- 
2.18.0

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[PATCH 05/10] drm/i915: Move drm_vblank_init() to i915_load_modeset_init()

[José Roberto de Souza]

i915_load_modeset_init() is a more suitable place than
i915_driver_load() as vblank is part of modeset.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 20 +++++++-------------
 1 file changed, 7 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 3ca30b9f2096..f95ffc4de554 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -646,6 +646,13 @@ static int i915_load_modeset_init(struct drm_device *dev)
 	if (i915_inject_load_failure())
 		return -ENODEV;
 
+	if (INTEL_INFO(dev_priv)->num_pipes == 0) {
+		ret = drm_vblank_init(&dev_priv->drm,
+				      INTEL_INFO(dev_priv)->num_pipes);
+		if (ret)
+			goto out;
+	}
+
 	intel_bios_init(dev_priv);
 
 	/* If we have > 1 VGA cards, then we need to arbitrate access
@@ -1365,18 +1372,6 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (ret < 0)
 		goto out_cleanup_mmio;
 
-	/*
-	 * TODO: move the vblank init and parts of modeset init steps into one
-	 * of the i915_driver_init_/i915_driver_register functions according
-	 * to the role/effect of the given init step.
-	 */
-	if (INTEL_INFO(dev_priv)->num_pipes) {
-		ret = drm_vblank_init(&dev_priv->drm,
-				      INTEL_INFO(dev_priv)->num_pipes);
-		if (ret)
-			goto out_cleanup_hw;
-	}
-
 	/* must happen before intel_power_domains_init_hw() on VLV/CHV */
 	intel_update_rawclk(dev_priv);
 
@@ -1418,7 +1413,6 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 	drm_irq_uninstall(&dev_priv->drm);
 out_cleanup_power:
 	intel_power_domains_fini(dev_priv);
-out_cleanup_hw:
 	i915_driver_cleanup_hw(dev_priv);
 out_cleanup_mmio:
 	i915_driver_cleanup_mmio(dev_priv);
-- 
2.18.0

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[PATCH 06/10] drm/i915: Move FBC init and cleanup calls to modeset functions

[José Roberto de Souza]

Although FBC helps save power it do not belongs to power management
also the cleanup was placed in i915_driver_unload() also not a good
place. intel_modeset_init()/intel_modeset_cleanup() are better places
also this will help make easy disable features that depends in
display being enabled in driver.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c      | 1 -
 drivers/gpu/drm/i915/intel_display.c | 4 ++++
 drivers/gpu/drm/i915/intel_pm.c      | 2 --
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f95ffc4de554..d4053d9a8b05 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1481,7 +1481,6 @@ void i915_driver_unload(struct drm_device *dev)
 	i915_reset_error_state(dev_priv);
 
 	i915_gem_fini(dev_priv);
-	intel_fbc_cleanup_cfb(dev_priv);
 
 	intel_power_domains_fini(dev_priv);
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 1b0ee796f697..df1424e46946 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15173,6 +15173,8 @@ int intel_modeset_init(struct drm_device *dev)
 
 	intel_init_quirks(dev);
 
+	intel_fbc_init(dev_priv);
+
 	intel_init_pm(dev_priv);
 
 	if (INTEL_INFO(dev_priv)->num_pipes == 0)
@@ -15987,6 +15989,8 @@ void intel_modeset_cleanup(struct drm_device *dev)
 	intel_teardown_gmbus(dev_priv);
 
 	destroy_workqueue(dev_priv->modeset_wq);
+
+	intel_fbc_cleanup_cfb(dev_priv);
 }
 
 void intel_connector_attach_encoder(struct intel_connector *connector,
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index e54a65405448..adf3776a2076 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -9255,8 +9255,6 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
 /* Set up chip specific power management-related functions */
 void intel_init_pm(struct drm_i915_private *dev_priv)
 {
-	intel_fbc_init(dev_priv);
-
 	/* For cxsr */
 	if (IS_PINEVIEW(dev_priv))
 		i915_pineview_get_mem_freq(dev_priv);
-- 
2.18.0

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[PATCH 07/10] drm/i915: Do not modifiy reserved bit in gens that do not have IPC

[José Roberto de Souza]

IPC was only added in SKL+(actually we don't even enable for SKL due
WA) so without this change, driver was writing to a reserved bit.

Also check for the WA in intel_init_ipc() to avoid further writes to
ipc_enabled.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index adf3776a2076..5cee42a4ef48 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6084,10 +6084,8 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
 	u32 val;
 
 	/* Display WA #0477 WaDisableIPC: skl */
-	if (IS_SKYLAKE(dev_priv)) {
-		dev_priv->ipc_enabled = false;
+	if (!HAS_IPC(dev_priv) || IS_SKYLAKE(dev_priv))
 		return;
-	}
 
 	val = I915_READ(DISP_ARB_CTL2);
 
@@ -6102,7 +6100,9 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv)
 void intel_init_ipc(struct drm_i915_private *dev_priv)
 {
 	dev_priv->ipc_enabled = false;
-	if (!HAS_IPC(dev_priv))
+
+	/* Display WA #0477 WaDisableIPC: skl */
+	if (!HAS_IPC(dev_priv) || IS_SKYLAKE(dev_priv))
 		return;
 
 	dev_priv->ipc_enabled = true;
-- 
2.18.0

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[PATCH 08/10] drm/i915: Move intel_init_ipc() call to i915_load_modeset_init()

[José Roberto de Souza]

IPC(Isochronous Priority Control not Inter-process communication btw)
is a display feature, so i915_load_modeset_init() is the right place
to initialize it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d4053d9a8b05..96b298643062 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -694,6 +694,8 @@ static int i915_load_modeset_init(struct drm_device *dev)
 	/* Only enable hotplug handling once the fbdev is fully set up. */
 	intel_hpd_init(dev_priv);
 
+	intel_init_ipc(dev_priv);
+
 	return 0;
 
 cleanup_modeset:
@@ -1396,8 +1398,6 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 
 	intel_runtime_pm_enable(dev_priv);
 
-	intel_init_ipc(dev_priv);
-
 	intel_runtime_pm_put(dev_priv);
 
 	i915_welcome_messages(dev_priv);
-- 
2.18.0

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[PATCH 09/10] drm/i915: Do not call modeset related functions when display is disabled

[José Roberto de Souza]

No need to run i915_load_modeset_init() when num_pipes == 0 also
kms depends on things initialized in i915_load_modeset_init() so not
initializing it too. fbdev and audio have guards against
num_pipes == 0 but lets move it to the if block to make it explicit
to readers.

Also as planes, CRTCs, encoders and connectors are not being added
it is necessary to unset the MODESET driver feature otherwise it
will crash when registering driver in drm, also disabling ATOMIC as
do not make sense have ATOMIC and do not have MODESET.

There is more modeset/display calls that still needs to be removed,
this is a initial work.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c         | 146 +++++++++++++++---------
 drivers/gpu/drm/i915/i915_suspend.c     |  24 ++--
 drivers/gpu/drm/i915/intel_runtime_pm.c |   3 +-
 3 files changed, 107 insertions(+), 66 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 96b298643062..5f02412e9aff 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1248,23 +1248,26 @@ static void i915_driver_register(struct drm_i915_private *dev_priv)
 	if (IS_GEN5(dev_priv))
 		intel_gpu_ips_init(dev_priv);
 
-	intel_audio_init(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		intel_audio_init(dev_priv);
 
-	/*
-	 * Some ports require correctly set-up hpd registers for detection to
-	 * work properly (leading to ghost connected connector status), e.g. VGA
-	 * on gm45.  Hence we can only set up the initial fbdev config after hpd
-	 * irqs are fully enabled. We do it last so that the async config
-	 * cannot run before the connectors are registered.
-	 */
-	intel_fbdev_initial_config_async(dev);
+		/*
+		 * Some ports require correctly set-up hpd registers for
+		 * detection to work properly (leading to ghost connected
+		 * connector status), e.g. VGA on gm45.  Hence we can only set
+		 * up the initial fbdev config after hpd irqs are fully enabled.
+		 * We do it last so that the async config cannot run before the
+		 * connectors are registered.
+		 */
+		intel_fbdev_initial_config_async(dev);
 
-	/*
-	 * We need to coordinate the hotplugs with the asynchronous fbdev
-	 * configuration, for which we use the fbdev->async_cookie.
-	 */
-	if (INTEL_INFO(dev_priv)->num_pipes)
+		/*
+		 * We need to coordinate the hotplugs with the asynchronous
+		 * fbdev configuration, for which we use the
+		 * fbdev->async_cookie.
+		 */
 		drm_kms_helper_poll_init(dev);
+	}
 }
 
 /**
@@ -1273,15 +1276,17 @@ static void i915_driver_register(struct drm_i915_private *dev_priv)
  */
 static void i915_driver_unregister(struct drm_i915_private *dev_priv)
 {
-	intel_fbdev_unregister(dev_priv);
-	intel_audio_deinit(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		intel_fbdev_unregister(dev_priv);
+		intel_audio_deinit(dev_priv);
 
-	/*
-	 * After flushing the fbdev (incl. a late async config which will
-	 * have delayed queuing of a hotplug event), then flush the hotplug
-	 * events.
-	 */
-	drm_kms_helper_poll_fini(&dev_priv->drm);
+		/*
+		 * After flushing the fbdev (incl. a late async config which
+		 * will have delayed queuing of a hotplug event), then flush the
+		 * hotplug events.
+		 */
+		drm_kms_helper_poll_fini(&dev_priv->drm);
+	}
 
 	intel_gpu_ips_teardown();
 	acpi_video_unregister();
@@ -1333,6 +1338,9 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (!i915_modparams.nuclear_pageflip && match_info->gen < 5)
 		driver.driver_features &= ~DRIVER_ATOMIC;
 
+	if (i915_modparams.disable_display)
+		driver.driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC);
+
 	ret = -ENOMEM;
 	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
 	if (dev_priv)
@@ -1390,9 +1398,11 @@ int i915_driver_load(struct pci_dev *pdev, const struct pci_device_id *ent)
 	if (ret)
 		goto cleanup_irq;
 
-	ret = i915_load_modeset_init(&dev_priv->drm);
-	if (ret < 0)
-		goto cleanup_gem;
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		ret = i915_load_modeset_init(&dev_priv->drm);
+		if (ret < 0)
+			goto cleanup_gem;
+	}
 
 	i915_driver_register(dev_priv);
 
@@ -1455,11 +1465,13 @@ void i915_driver_unload(struct drm_device *dev)
 
 	intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
 
-	drm_atomic_helper_shutdown(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		drm_atomic_helper_shutdown(dev);
 
 	intel_gvt_cleanup(dev_priv);
 
-	intel_modeset_cleanup_prepare(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_modeset_cleanup_prepare(dev);
 
 	intel_disable_gt_powersave(dev_priv);
 
@@ -1470,11 +1482,13 @@ void i915_driver_unload(struct drm_device *dev)
 	 */
 	intel_irq_uninstall(dev_priv);
 
-	intel_modeset_cleanup(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_modeset_cleanup(dev);
 
 	intel_cleanup_gt_powersave(dev_priv);
 
-	i915_modeset_unload(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		i915_modeset_unload(dev);
 
 	/* Free error state after interrupts are fully disabled. */
 	cancel_delayed_work_sync(&dev_priv->gpu_error.hangcheck_work);
@@ -1526,8 +1540,12 @@ static int i915_driver_open(struct drm_device *dev, struct drm_file *file)
  */
 static void i915_driver_lastclose(struct drm_device *dev)
 {
-	intel_fbdev_restore_mode(dev);
-	vga_switcheroo_process_delayed_switch();
+	struct drm_i915_private *dev_priv = to_i915(dev);
+
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		intel_fbdev_restore_mode(dev);
+		vga_switcheroo_process_delayed_switch();
+	}
 }
 
 static void i915_driver_postclose(struct drm_device *dev, struct drm_file *file)
@@ -1597,19 +1615,24 @@ static int i915_drm_suspend(struct drm_device *dev)
 	/* We do a lot of poking in a lot of registers, make sure they work
 	 * properly. */
 	intel_display_set_init_power(dev_priv, true);
-
-	drm_kms_helper_poll_disable(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		drm_kms_helper_poll_disable(dev);
 
 	pci_save_state(pdev);
 
-	intel_display_suspend(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		intel_display_suspend(dev);
 
-	intel_dp_mst_suspend(dev_priv);
+		intel_dp_mst_suspend(dev_priv);
+	}
 
 	intel_runtime_pm_disable_interrupts(dev_priv);
-	intel_hpd_cancel_work(dev_priv);
 
-	intel_suspend_encoders(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		intel_hpd_cancel_work(dev_priv);
+
+		intel_suspend_encoders(dev_priv);
+	}
 
 	intel_suspend_hw(dev_priv);
 
@@ -1622,11 +1645,13 @@ static int i915_drm_suspend(struct drm_device *dev)
 
 	intel_opregion_unregister(dev_priv);
 
-	intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED, true);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED, true);
 
 	dev_priv->suspend_count++;
 
-	intel_csr_ucode_suspend(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_csr_ucode_suspend(dev_priv);
 
 	enable_rpm_wakeref_asserts(dev_priv);
 
@@ -1737,10 +1762,12 @@ static int i915_drm_resume(struct drm_device *dev)
 	if (ret)
 		DRM_ERROR("failed to re-enable GGTT\n");
 
-	intel_csr_ucode_resume(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_csr_ucode_resume(dev_priv);
 
 	i915_restore_state(dev_priv);
-	intel_pps_unlock_regs_wa(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_pps_unlock_regs_wa(dev_priv);
 	intel_opregion_setup(dev_priv);
 
 	intel_init_pch_refclk(dev_priv);
@@ -1757,7 +1784,8 @@ static int i915_drm_resume(struct drm_device *dev)
 	 */
 	intel_runtime_pm_enable_interrupts(dev_priv);
 
-	drm_mode_config_reset(dev);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		drm_mode_config_reset(dev);
 
 	i915_gem_resume(dev_priv);
 
@@ -1769,23 +1797,26 @@ static int i915_drm_resume(struct drm_device *dev)
 		dev_priv->display.hpd_irq_setup(dev_priv);
 	spin_unlock_irq(&dev_priv->irq_lock);
 
-	intel_dp_mst_resume(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		intel_dp_mst_resume(dev_priv);
 
-	intel_display_resume(dev);
+		intel_display_resume(dev);
 
-	drm_kms_helper_poll_enable(dev);
+		drm_kms_helper_poll_enable(dev);
 
-	/*
-	 * ... but also need to make sure that hotplug processing
-	 * doesn't cause havoc. Like in the driver load code we don't
-	 * bother with the tiny race here where we might loose hotplug
-	 * notifications.
-	 * */
-	intel_hpd_init(dev_priv);
+		/*
+		 * ... but also need to make sure that hotplug processing
+		 * doesn't cause havoc. Like in the driver load code we don't
+		 * bother with the tiny race here where we might loose hotplug
+		 * notifications.
+		 */
+		intel_hpd_init(dev_priv);
+	}
 
 	intel_opregion_register(dev_priv);
 
-	intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING, false);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING, false);
 
 	intel_opregion_notify_adapter(dev_priv, PCI_D0);
 
@@ -2689,7 +2720,8 @@ static int intel_runtime_suspend(struct device *kdev)
 
 	assert_forcewakes_inactive(dev_priv);
 
-	if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
+	if (INTEL_INFO(dev_priv)->num_pipes && (!IS_VALLEYVIEW(dev_priv) &&
+						!IS_CHERRYVIEW(dev_priv)))
 		intel_hpd_poll_init(dev_priv);
 
 	DRM_DEBUG_KMS("Device suspended\n");
@@ -2746,10 +2778,12 @@ static int intel_runtime_resume(struct device *kdev)
 	 * power well, so hpd is reinitialized from there. For
 	 * everyone else do it here.
 	 */
-	if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
+	if (INTEL_INFO(dev_priv)->num_pipes && (!IS_VALLEYVIEW(dev_priv) &&
+						!IS_CHERRYVIEW(dev_priv)))
 		intel_hpd_init(dev_priv);
 
-	intel_enable_ipc(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_enable_ipc(dev_priv);
 
 	enable_rpm_wakeref_asserts(dev_priv);
 
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 8f3aa4dc0c98..f697865236a6 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -63,11 +63,13 @@ int i915_save_state(struct drm_i915_private *dev_priv)
 
 	mutex_lock(&dev_priv->drm.struct_mutex);
 
-	i915_save_display(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		i915_save_display(dev_priv);
 
-	if (IS_GEN4(dev_priv))
-		pci_read_config_word(pdev, GCDGMBUS,
-				     &dev_priv->regfile.saveGCDGMBUS);
+		if (IS_GEN4(dev_priv))
+			pci_read_config_word(pdev, GCDGMBUS,
+					     &dev_priv->regfile.saveGCDGMBUS);
+	}
 
 	/* Cache mode state */
 	if (INTEL_GEN(dev_priv) < 7)
@@ -108,10 +110,13 @@ int i915_restore_state(struct drm_i915_private *dev_priv)
 
 	mutex_lock(&dev_priv->drm.struct_mutex);
 
-	if (IS_GEN4(dev_priv))
-		pci_write_config_word(pdev, GCDGMBUS,
-				      dev_priv->regfile.saveGCDGMBUS);
-	i915_restore_display(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes) {
+		if (IS_GEN4(dev_priv))
+			pci_write_config_word(pdev, GCDGMBUS,
+					      dev_priv->regfile.saveGCDGMBUS);
+
+		i915_restore_display(dev_priv);
+	}
 
 	/* Cache mode state */
 	if (INTEL_GEN(dev_priv) < 7)
@@ -143,7 +148,8 @@ int i915_restore_state(struct drm_i915_private *dev_priv)
 
 	mutex_unlock(&dev_priv->drm.struct_mutex);
 
-	intel_i2c_reset(dev_priv);
+	if (INTEL_INFO(dev_priv)->num_pipes)
+		intel_i2c_reset(dev_priv);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index fb12df402d21..a43acd979f47 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -1038,7 +1038,8 @@ static void vlv_display_power_well_deinit(struct drm_i915_private *dev_priv)
 	intel_power_sequencer_reset(dev_priv);
 
 	/* Prevent us from re-enabling polling on accident in late suspend */
-	if (!dev_priv->drm.dev->power.is_suspended)
+	if (INTEL_INFO(dev_priv)->num_pipes &&
+	    !dev_priv->drm.dev->power.is_suspended)
 		intel_hpd_poll_init(dev_priv);
 }
 
-- 
2.18.0

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[PATCH 10/10] drm/i915: Remove redundant checks for num_pipes == 0

[José Roberto de Souza]

This 'if's will always be false because of previous changes so let's
drop then.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c      | 12 +++---------
 drivers/gpu/drm/i915/intel_audio.c   |  3 ---
 drivers/gpu/drm/i915/intel_display.c |  3 ---
 drivers/gpu/drm/i915/intel_i2c.c     |  3 ---
 4 files changed, 3 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 5f02412e9aff..becc52e4ce1f 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -646,12 +646,9 @@ static int i915_load_modeset_init(struct drm_device *dev)
 	if (i915_inject_load_failure())
 		return -ENODEV;
 
-	if (INTEL_INFO(dev_priv)->num_pipes == 0) {
-		ret = drm_vblank_init(&dev_priv->drm,
-				      INTEL_INFO(dev_priv)->num_pipes);
-		if (ret)
-			goto out;
-	}
+	ret = drm_vblank_init(&dev_priv->drm, INTEL_INFO(dev_priv)->num_pipes);
+	if (ret)
+		goto out;
 
 	intel_bios_init(dev_priv);
 
@@ -684,9 +681,6 @@ static int i915_load_modeset_init(struct drm_device *dev)
 
 	intel_setup_overlay(dev_priv);
 
-	if (INTEL_INFO(dev_priv)->num_pipes == 0)
-		return 0;
-
 	ret = intel_fbdev_init(dev);
 	if (ret)
 		goto cleanup_modeset;
diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c
index b725835b47ef..769f3f586661 100644
--- a/drivers/gpu/drm/i915/intel_audio.c
+++ b/drivers/gpu/drm/i915/intel_audio.c
@@ -962,9 +962,6 @@ void i915_audio_component_init(struct drm_i915_private *dev_priv)
 {
 	int ret;
 
-	if (INTEL_INFO(dev_priv)->num_pipes == 0)
-		return;
-
 	ret = component_add(dev_priv->drm.dev, &i915_audio_component_bind_ops);
 	if (ret < 0) {
 		DRM_ERROR("failed to add audio component (%d)\n", ret);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index df1424e46946..371ec75a582a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15177,9 +15177,6 @@ int intel_modeset_init(struct drm_device *dev)
 
 	intel_init_pm(dev_priv);
 
-	if (INTEL_INFO(dev_priv)->num_pipes == 0)
-		return 0;
-
 	/*
 	 * There may be no VBT; and if the BIOS enabled SSC we can
 	 * just keep using it to avoid unnecessary flicker.  Whereas if the
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index bef32b7c248e..2f941c5b2e8c 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -819,9 +819,6 @@ int intel_setup_gmbus(struct drm_i915_private *dev_priv)
 	unsigned int pin;
 	int ret;
 
-	if (INTEL_INFO(dev_priv)->num_pipes == 0)
-		return 0;
-
 	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
 		dev_priv->gpio_mmio_base = VLV_DISPLAY_BASE;
 	else if (!HAS_GMCH_DISPLAY(dev_priv))
-- 
2.18.0

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✗ Fi.CI.CHECKPATCH: warning for series starting with [01/10] drm: Let userspace check if driver supports modeset

[Patchwork]

== Series Details ==

Series: series starting with [01/10] drm: Let userspace check if driver supports modeset
URL   : https://patchwork.freedesktop.org/series/47305/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
567aacc6c2de drm: Let userspace check if driver supports modeset
78d72d646760 drm/i915: Set PCH as NOP when display is disabled
0921a126e61a drm/i915/runtime_pm: Share code to enable/disable PCH reset handshake
3b6760d43d6a drm/i915: Move out non-display related calls from display/modeset init/cleanup
772f7c9dd2a4 drm/i915: Move drm_vblank_init() to i915_load_modeset_init()
a012ec222be1 drm/i915: Move FBC init and cleanup calls to modeset functions
0cde7653decc drm/i915: Do not modifiy reserved bit in gens that do not have IPC
4b2160875329 drm/i915: Move intel_init_ipc() call to i915_load_modeset_init()
de77f0ba5a1c drm/i915: Do not call modeset related functions when display is disabled
-:321: CHECK:CAMELCASE: Avoid CamelCase: <saveGCDGMBUS>
#321: FILE: drivers/gpu/drm/i915/i915_suspend.c:71:
+					     &dev_priv->regfile.saveGCDGMBUS);

total: 0 errors, 0 warnings, 1 checks, 312 lines checked
68537e160d4c drm/i915: Remove redundant checks for num_pipes == 0

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✗ Fi.CI.SPARSE: warning for series starting with [01/10] drm: Let userspace check if driver supports modeset

[Patchwork]

== Series Details ==

Series: series starting with [01/10] drm: Let userspace check if driver supports modeset
URL   : https://patchwork.freedesktop.org/series/47305/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Commit: drm: Let userspace check if driver supports modeset
Okay!

Commit: drm/i915: Set PCH as NOP when display is disabled
Okay!

Commit: drm/i915/runtime_pm: Share code to enable/disable PCH reset handshake
Okay!

Commit: drm/i915: Move out non-display related calls from display/modeset init/cleanup
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3645:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3646:16: warning: expression using sizeof(void)

Commit: drm/i915: Move drm_vblank_init() to i915_load_modeset_init()
Okay!

Commit: drm/i915: Move FBC init and cleanup calls to modeset functions
Okay!

Commit: drm/i915: Do not modifiy reserved bit in gens that do not have IPC
Okay!

Commit: drm/i915: Move intel_init_ipc() call to i915_load_modeset_init()
Okay!

Commit: drm/i915: Do not call modeset related functions when display is disabled
Okay!

Commit: drm/i915: Remove redundant checks for num_pipes == 0
Okay!

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✓ Fi.CI.BAT: success for series starting with [01/10] drm: Let userspace check if driver supports modeset

[Patchwork]

== Series Details ==

Series: series starting with [01/10] drm: Let userspace check if driver supports modeset
URL   : https://patchwork.freedesktop.org/series/47305/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4554 -> Patchwork_9785 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/47305/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_9785 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@drv_module_reload@basic-reload:
      fi-glk-j4005:       PASS -> DMESG-WARN (fdo#106248, fdo#106725)

    igt@drv_selftest@live_hangcheck:
      fi-skl-guc:         PASS -> DMESG-FAIL (fdo#107174)

    
    ==== Possible fixes ====

    igt@drv_selftest@live_evict:
      fi-cnl-psr:         DMESG-WARN -> SKIP +8

    igt@drv_selftest@live_objects:
      fi-cnl-psr:         DMESG-FAIL -> SKIP

    igt@drv_selftest@live_requests:
      fi-cnl-psr:         DMESG-WARN (fdo#105395) -> SKIP

    igt@drv_selftest@live_sanitycheck:
      fi-cnl-psr:         DMESG-WARN (fdo#105395) -> PASS +1

    igt@kms_flip@basic-flip-vs-modeset:
      fi-skl-6700hq:      DMESG-WARN (fdo#105998) -> PASS

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-snb-2520m:       INCOMPLETE (fdo#103713) -> PASS

    
    ==== Warnings ====

    igt@drv_selftest@live_workarounds:
      fi-cnl-psr:         DMESG-WARN (fdo#105395) -> DMESG-FAIL (fdo#107292)

    
  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#105395 https://bugs.freedesktop.org/show_bug.cgi?id=105395
  fdo#105998 https://bugs.freedesktop.org/show_bug.cgi?id=105998
  fdo#106248 https://bugs.freedesktop.org/show_bug.cgi?id=106248
  fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725
  fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174
  fdo#107292 https://bugs.freedesktop.org/show_bug.cgi?id=107292


== Participating hosts (50 -> 42) ==

  Missing    (8): fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-icl-u fi-byt-clapper 


== Build changes ==

    * Linux: CI_DRM_4554 -> Patchwork_9785

  CI_DRM_4554: 5ce2e0fe88bd5a3615abb7289ab98d487201c450 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4576: bcb37a9b20eeec97f15fac2222408cc2e0b77631 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9785: 68537e160d4c91a3aacd5264faaa04a9fc351ca7 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

68537e160d4c drm/i915: Remove redundant checks for num_pipes == 0
de77f0ba5a1c drm/i915: Do not call modeset related functions when display is disabled
4b2160875329 drm/i915: Move intel_init_ipc() call to i915_load_modeset_init()
0cde7653decc drm/i915: Do not modifiy reserved bit in gens that do not have IPC
a012ec222be1 drm/i915: Move FBC init and cleanup calls to modeset functions
772f7c9dd2a4 drm/i915: Move drm_vblank_init() to i915_load_modeset_init()
3b6760d43d6a drm/i915: Move out non-display related calls from display/modeset init/cleanup
0921a126e61a drm/i915/runtime_pm: Share code to enable/disable PCH reset handshake
78d72d646760 drm/i915: Set PCH as NOP when display is disabled
567aacc6c2de drm: Let userspace check if driver supports modeset

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9785/issues.html
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✗ Fi.CI.IGT: failure for series starting with [01/10] drm: Let userspace check if driver supports modeset

[Patchwork]

== Series Details ==

Series: series starting with [01/10] drm: Let userspace check if driver supports modeset
URL   : https://patchwork.freedesktop.org/series/47305/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4554_full -> Patchwork_9785_full =

== Summary - FAILURE ==

  Serious unknown changes coming with Patchwork_9785_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_9785_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9785_full:

  === IGT changes ===

    ==== Possible regressions ====

    igt@drv_module_reload@basic-reload-inject:
      shard-apl:          PASS -> DMESG-WARN

    
    ==== Warnings ====

    igt@gem_mocs_settings@mocs-rc6-vebox:
      shard-kbl:          SKIP -> PASS +1

    
== Known issues ==

  Here are the changes found in Patchwork_9785_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_flip@dpms-vs-vblank-race-interruptible:
      shard-glk:          PASS -> FAIL (fdo#103060)

    igt@kms_flip@modeset-vs-vblank-race-interruptible:
      shard-hsw:          PASS -> FAIL (fdo#103060)

    igt@kms_flip@plain-flip-fb-recreate-interruptible:
      shard-glk:          PASS -> FAIL (fdo#100368) +1

    igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
      shard-glk:          PASS -> FAIL (fdo#103375)

    
    ==== Possible fixes ====

    igt@drv_suspend@shrink:
      shard-snb:          INCOMPLETE (fdo#106886, fdo#105411) -> PASS

    igt@gem_eio@in-flight-suspend:
      shard-snb:          DMESG-WARN (fdo#102365) -> PASS

    igt@gem_softpin@noreloc-s3:
      shard-kbl:          INCOMPLETE (fdo#103665) -> PASS

    igt@kms_flip@2x-flip-vs-expired-vblank:
      shard-glk:          FAIL (fdo#105363) -> PASS

    igt@kms_flip@flip-vs-expired-vblank-interruptible:
      shard-glk:          FAIL (fdo#105189) -> PASS

    
  fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
  fdo#102365 https://bugs.freedesktop.org/show_bug.cgi?id=102365
  fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
  fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
  fdo#103665 https://bugs.freedesktop.org/show_bug.cgi?id=103665
  fdo#105189 https://bugs.freedesktop.org/show_bug.cgi?id=105189
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
  fdo#106886 https://bugs.freedesktop.org/show_bug.cgi?id=106886


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4554 -> Patchwork_9785

  CI_DRM_4554: 5ce2e0fe88bd5a3615abb7289ab98d487201c450 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4576: bcb37a9b20eeec97f15fac2222408cc2e0b77631 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9785: 68537e160d4c91a3aacd5264faaa04a9fc351ca7 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9785/shards.html
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