intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
* [PATCH 1/2] drm/i915/icl: Add TBT checks for PLL calculations
@ 2018-07-26 23:35 Anusha Srivatsa
  2018-07-26 23:35 ` [PATCH 2/2] drm/i915/icl: Set TBT IO in Aux transaction Anusha Srivatsa
                   ` (4 more replies)
  0 siblings, 5 replies; 8+ messages in thread
From: Anusha Srivatsa @ 2018-07-26 23:35 UTC (permalink / raw)
  To: intel-gfx; +Cc: Lucas De Marchi, Paulo Zanoni

Add missing TBT check in the Pll calculation.

v2: do not use a auxiliary function to check if status is
TBT or not. (Paulo)

v3: Code style changes. (Paulo)

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/intel_dpll_mgr.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 7e5e6eb..20c9068 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -2866,6 +2866,8 @@ static struct intel_shared_dpll *
 icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
 	     struct intel_encoder *encoder)
 {
+	struct intel_digital_port *intel_dig_port =
+			enc_to_dig_port(&encoder->base);
 	struct intel_shared_dpll *pll;
 	struct intel_dpll_hw_state pll_state = {};
 	enum port port = encoder->port;
@@ -2885,7 +2887,7 @@ icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
 	case PORT_D:
 	case PORT_E:
 	case PORT_F:
-		if (0 /* TODO: TBT PLLs */) {
+		if (intel_dig_port->tc_type == TC_PORT_TBT) {
 			min = DPLL_ID_ICL_TBTPLL;
 			max = min;
 			ret = icl_calc_dpll_state(crtc_state, encoder, clock,
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* [PATCH 1/2] drm/i915/icl: Add TBT checks for PLL calculations
@ 2018-07-25 21:28 Anusha Srivatsa
  2018-07-26  0:06 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
  0 siblings, 1 reply; 8+ messages in thread
From: Anusha Srivatsa @ 2018-07-25 21:28 UTC (permalink / raw)
  To: intel-gfx; +Cc: Lucas De Marchi, Paulo Zanoni

Add missing TBT check in the Pll calculation.

v2: do not use a auxiliary function to check if status is
TBT or not. (Paulo)

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/intel_dpll_mgr.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 7e5e6eb..ba49078 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -428,6 +428,7 @@ ibx_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
 	     struct intel_encoder *encoder)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+
 	struct intel_shared_dpll *pll;
 	enum intel_dpll_id i;
 
@@ -2866,6 +2867,9 @@ static struct intel_shared_dpll *
 icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
 	     struct intel_encoder *encoder)
 {
+	struct intel_digital_port *intel_dig_port =
+			enc_to_dig_port(&encoder->base);
+
 	struct intel_shared_dpll *pll;
 	struct intel_dpll_hw_state pll_state = {};
 	enum port port = encoder->port;
@@ -2885,7 +2889,7 @@ icl_get_dpll(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
 	case PORT_D:
 	case PORT_E:
 	case PORT_F:
-		if (0 /* TODO: TBT PLLs */) {
+		if (intel_dig_port->tc_type == TC_PORT_TBT) {
 			min = DPLL_ID_ICL_TBTPLL;
 			max = min;
 			ret = icl_calc_dpll_state(crtc_state, encoder, clock,
-- 
2.7.4

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2018-07-28  2:10 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-07-26 23:35 [PATCH 1/2] drm/i915/icl: Add TBT checks for PLL calculations Anusha Srivatsa
2018-07-26 23:35 ` [PATCH 2/2] drm/i915/icl: Set TBT IO in Aux transaction Anusha Srivatsa
2018-07-27 20:57   ` Paulo Zanoni
2018-07-27  0:18 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/icl: Add TBT checks for PLL calculations Patchwork
2018-07-27 20:56 ` [PATCH 1/2] " Paulo Zanoni
2018-07-27 22:52 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2018-07-28  2:10 ` ✓ Fi.CI.IGT: " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2018-07-25 21:28 [PATCH 1/2] " Anusha Srivatsa
2018-07-26  0:06 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).