From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhenyu Wang Subject: Re: [PATCH v4 1/3] drm/i915: make PCH_GMBUS* definitions private to gvt Date: Tue, 31 Jul 2018 10:45:28 +0800 Message-ID: <20180731024528.GH22630@zhen-hp.sh.intel.com> References: <20180727193647.8639-1-lucas.demarchi@intel.com> Reply-To: Zhenyu Wang Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0143228599==" Return-path: In-Reply-To: <20180727193647.8639-1-lucas.demarchi@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Lucas De Marchi Cc: daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org, Rodrigo Vivi , intel-gvt-dev@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0143228599== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="qxfKREH7IwbezJ+T" Content-Disposition: inline --qxfKREH7IwbezJ+T Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 2018.07.27 12:36:45 -0700, Lucas De Marchi wrote: > This is the only place that they are being used - the others use the > GMBUS* macros that rely on dev_priv being already properly initialized. > Reviewed-by: Zhenyu Wang thanks! > Cc: intel-gvt-dev@lists.freedesktop.org > Cc: Zhenyu Wang > Signed-off-by: Lucas De Marchi > --- > drivers/gpu/drm/i915/gvt/reg.h | 7 +++++++ > drivers/gpu/drm/i915/i915_reg.h | 7 ------- > 2 files changed, 7 insertions(+), 7 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/gvt/reg.h b/drivers/gpu/drm/i915/gvt/re= g.h > index d4f7ce6dc1d7..fd5fd25d0a0f 100644 > --- a/drivers/gpu/drm/i915/gvt/reg.h > +++ b/drivers/gpu/drm/i915/gvt/reg.h > @@ -77,4 +77,11 @@ > #define _RING_CTL_BUF_SIZE(ctl) (((ctl) & RB_TAIL_SIZE_MASK) + \ > I915_GTT_PAGE_SIZE) > =20 > +#define PCH_GMBUS0 _MMIO(0xc5100) > +#define PCH_GMBUS1 _MMIO(0xc5104) > +#define PCH_GMBUS2 _MMIO(0xc5108) > +#define PCH_GMBUS3 _MMIO(0xc510c) > +#define PCH_GMBUS4 _MMIO(0xc5110) > +#define PCH_GMBUS5 _MMIO(0xc5120) > + > #endif > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_= reg.h > index 5530c470f30d..07606677168c 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -7875,13 +7875,6 @@ enum { > #define PCH_GPIOE _MMIO(0xc5020) > #define PCH_GPIOF _MMIO(0xc5024) > =20 > -#define PCH_GMBUS0 _MMIO(0xc5100) > -#define PCH_GMBUS1 _MMIO(0xc5104) > -#define PCH_GMBUS2 _MMIO(0xc5108) > -#define PCH_GMBUS3 _MMIO(0xc510c) > -#define PCH_GMBUS4 _MMIO(0xc5110) > -#define PCH_GMBUS5 _MMIO(0xc5120) > - > #define _PCH_DPLL_A 0xc6014 > #define _PCH_DPLL_B 0xc6018 > #define PCH_DPLL(pll) _MMIO((pll) =3D=3D 0 ? _PCH_DPLL_A : _PCH_DPLL_B) > --=20 > 2.17.1 >=20 > _______________________________________________ > intel-gvt-dev mailing list > intel-gvt-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev --=20 Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 --qxfKREH7IwbezJ+T Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iF0EARECAB0WIQTXuabgHDW6LPt9CICxBBozTXgYJwUCW1/NSAAKCRCxBBozTXgY J+2nAKCYtbzf2EEVLcSEKXBLzj3LUsgZNACgkEdIhErvV1g/Qos4tVQTR/DYMCk= =70BF -----END PGP SIGNATURE----- --qxfKREH7IwbezJ+T-- --===============0143228599== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg== --===============0143228599==--