From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhenyu Wang Subject: Re: [PATCH v4 2/3] drm/i915/gvt: use its own define for gpio Date: Tue, 31 Jul 2018 10:46:29 +0800 Message-ID: <20180731024629.GI22630@zhen-hp.sh.intel.com> References: <20180727193647.8639-1-lucas.demarchi@intel.com> <20180727193647.8639-2-lucas.demarchi@intel.com> Reply-To: Zhenyu Wang Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1570216886==" Return-path: In-Reply-To: <20180727193647.8639-2-lucas.demarchi@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Lucas De Marchi Cc: daniel.vetter@ffwll.ch, intel-gfx@lists.freedesktop.org, Rodrigo Vivi , intel-gvt-dev@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============1570216886== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="MP5ln1Rcf9Bvi+ZW" Content-Disposition: inline --MP5ln1Rcf9Bvi+ZW Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 2018.07.27 12:36:46 -0700, Lucas De Marchi wrote: > The definition on i915_reg.h is going to change to depend on > dev_priv->gpio_mmio_base being properly initialized. Define our own > macros since init_generic_mmio_info() is called before than > gpio_mmio_base being set. > Reviewed-by: Zhenyu Wang > Cc: intel-gvt-dev@lists.freedesktop.org > Cc: Zhenyu Wang > Signed-off-by: Lucas De Marchi > --- > drivers/gpu/drm/i915/gvt/handlers.c | 2 +- > drivers/gpu/drm/i915/gvt/reg.h | 2 ++ > 2 files changed, 3 insertions(+), 1 deletion(-) >=20 > diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/g= vt/handlers.c > index 7a58ca555197..0dc8692d7eb3 100644 > --- a/drivers/gpu/drm/i915/gvt/handlers.c > +++ b/drivers/gpu/drm/i915/gvt/handlers.c > @@ -2118,7 +2118,7 @@ static int init_generic_mmio_info(struct intel_gvt = *gvt) > =20 > MMIO_F(PCH_GMBUS0, 4 * 4, 0, 0, 0, D_ALL, gmbus_mmio_read, > gmbus_mmio_write); > - MMIO_F(PCH_GPIOA, 6 * 4, F_UNALIGN, 0, 0, D_ALL, NULL, NULL); > + MMIO_F(PCH_GPIO_BASE, 6 * 4, F_UNALIGN, 0, 0, D_ALL, NULL, NULL); > MMIO_F(_MMIO(0xe4f00), 0x28, 0, 0, 0, D_ALL, NULL, NULL); > =20 > MMIO_F(_MMIO(_PCH_DPB_AUX_CH_CTL), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL, > diff --git a/drivers/gpu/drm/i915/gvt/reg.h b/drivers/gpu/drm/i915/gvt/re= g.h > index fd5fd25d0a0f..c9d6cf6cc623 100644 > --- a/drivers/gpu/drm/i915/gvt/reg.h > +++ b/drivers/gpu/drm/i915/gvt/reg.h > @@ -77,6 +77,8 @@ > #define _RING_CTL_BUF_SIZE(ctl) (((ctl) & RB_TAIL_SIZE_MASK) + \ > I915_GTT_PAGE_SIZE) > =20 > +#define PCH_GPIO_BASE _MMIO(0xc5010) > + > #define PCH_GMBUS0 _MMIO(0xc5100) > #define PCH_GMBUS1 _MMIO(0xc5104) > #define PCH_GMBUS2 _MMIO(0xc5108) > --=20 > 2.17.1 >=20 > _______________________________________________ > intel-gvt-dev mailing list > intel-gvt-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev --=20 Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 --MP5ln1Rcf9Bvi+ZW Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iF0EARECAB0WIQTXuabgHDW6LPt9CICxBBozTXgYJwUCW1/NhQAKCRCxBBozTXgY J4yXAJ9W8cqkglXu+yzsLSmPtG62r2c9egCZAbVQXeiN6M9ba9UlFn4Oj/8f5ew= =nCVt -----END PGP SIGNATURE----- --MP5ln1Rcf9Bvi+ZW-- --===============1570216886== Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Content-Disposition: inline X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4 IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlz dHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg== --===============1570216886==--