[PATCH] drm/i915/execlists: Include reset depth in traces

[PATCH] drm/i915/execlists: Include reset depth in traces

[Chris Wilson]

Show the reset depth (the tasklet disable count) in the GEM_TRACE to
indicate when we might not expect tasklets to be flushed.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_lrc.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 178a74e29400..257d6f5f44d1 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1834,7 +1834,8 @@ execlists_reset_prepare(struct intel_engine_cs *engine)
 	struct i915_request *request, *active;
 	unsigned long flags;
 
-	GEM_TRACE("%s\n", engine->name);
+	GEM_TRACE("%s: depth<-%d\n", engine->name,
+		  atomic_read(&execlists->tasklet.count));
 
 	/*
 	 * Prevent request submission to the hardware until we have
@@ -1982,7 +1983,8 @@ static void execlists_reset_finish(struct intel_engine_cs *engine)
 	 */
 	__tasklet_enable_sync_once(&execlists->tasklet);
 
-	GEM_TRACE("%s\n", engine->name);
+	GEM_TRACE("%s: depth->%d\n", engine->name,
+		  atomic_read(&execlists->tasklet.count));
 }
 
 static int intel_logical_ring_emit_pdps(struct i915_request *rq)
-- 
2.18.0

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✓ Fi.CI.BAT: success for drm/i915/execlists: Include reset depth in traces

[Patchwork]

== Series Details ==

Series: drm/i915/execlists: Include reset depth in traces
URL   : https://patchwork.freedesktop.org/series/48263/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4671 -> Patchwork_9955 =

== Summary - SUCCESS ==

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/48263/revisions/1/mbox/

== Known issues ==

  Here are the changes found in Patchwork_9955 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@debugfs_test@read_all_entries:
      fi-snb-2520m:       PASS -> INCOMPLETE (fdo#103713)

    igt@drv_selftest@live_hangcheck:
      fi-skl-guc:         PASS -> DMESG-FAIL (fdo#107174)

    igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
      {fi-icl-u}:         NOTRUN -> DMESG-WARN (fdo#107382) +4

    {igt@kms_psr@primary_page_flip}:
      {fi-icl-u}:         NOTRUN -> FAIL (fdo#107383) +3

    
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
  fdo#107174 https://bugs.freedesktop.org/show_bug.cgi?id=107174
  fdo#107382 https://bugs.freedesktop.org/show_bug.cgi?id=107382
  fdo#107383 https://bugs.freedesktop.org/show_bug.cgi?id=107383


== Participating hosts (53 -> 49) ==

  Additional (1): fi-icl-u 
  Missing    (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u 


== Build changes ==

    * Linux: CI_DRM_4671 -> Patchwork_9955

  CI_DRM_4671: 77a98fa3e9b6eb29d513b1666ecddfdcfc424e86 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4598: 9c0f04355107a8693650b16756b6343a78501138 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9955: b5ab07b47b12915d45ef7148c264bd310255fb3b @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

b5ab07b47b12 drm/i915/execlists: Include reset depth in traces

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9955/issues.html
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✓ Fi.CI.IGT: success for drm/i915/execlists: Include reset depth in traces

[Patchwork]

== Series Details ==

Series: drm/i915/execlists: Include reset depth in traces
URL   : https://patchwork.freedesktop.org/series/48263/
State : success

== Summary ==

= CI Bug Log - changes from CI_DRM_4671_full -> Patchwork_9955_full =

== Summary - WARNING ==

  Minor unknown changes coming with Patchwork_9955_full need to be verified
  manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_9955_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Patchwork_9955_full:

  === IGT changes ===

    ==== Warnings ====

    igt@pm_rc6_residency@rc6-accuracy:
      shard-snb:          PASS -> SKIP

    
== Known issues ==

  Here are the changes found in Patchwork_9955_full that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt@kms_setmode@basic:
      shard-apl:          PASS -> FAIL (fdo#99912)

    
    ==== Possible fixes ====

    igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
      shard-glk:          FAIL (fdo#105363) -> PASS

    
  fdo#105363 https://bugs.freedesktop.org/show_bug.cgi?id=105363
  fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912


== Participating hosts (5 -> 5) ==

  No changes in participating hosts


== Build changes ==

    * Linux: CI_DRM_4671 -> Patchwork_9955

  CI_DRM_4671: 77a98fa3e9b6eb29d513b1666ecddfdcfc424e86 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4598: 9c0f04355107a8693650b16756b6343a78501138 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_9955: b5ab07b47b12915d45ef7148c264bd310255fb3b @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9955/shards.html
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Re: [PATCH] drm/i915/execlists: Include reset depth in traces

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Show the reset depth (the tasklet disable count) in the GEM_TRACE to
> indicate when we might not expect tasklets to be flushed.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/intel_lrc.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 178a74e29400..257d6f5f44d1 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1834,7 +1834,8 @@ execlists_reset_prepare(struct intel_engine_cs *engine)
>  	struct i915_request *request, *active;
>  	unsigned long flags;
>  
> -	GEM_TRACE("%s\n", engine->name);
> +	GEM_TRACE("%s: depth<-%d\n", engine->name,
> +		  atomic_read(&execlists->tasklet.count));

Interesting notation but yes, entry and exit will be visible.

I can't think of the details on a case when this would matter.
Regardless, the knowledge of at what point we flushed or not
is beneficial.

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

>  
>  	/*
>  	 * Prevent request submission to the hardware until we have
> @@ -1982,7 +1983,8 @@ static void execlists_reset_finish(struct intel_engine_cs *engine)
>  	 */
>  	__tasklet_enable_sync_once(&execlists->tasklet);
>  
> -	GEM_TRACE("%s\n", engine->name);
> +	GEM_TRACE("%s: depth->%d\n", engine->name,
> +		  atomic_read(&execlists->tasklet.count));
>  }
>  
>  static int intel_logical_ring_emit_pdps(struct i915_request *rq)
> -- 
> 2.18.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [PATCH] drm/i915/execlists: Include reset depth in traces

[Chris Wilson]

Quoting Mika Kuoppala (2018-08-16 12:04:28)
> Chris Wilson <chris@chris-wilson.co.uk> writes:
> 
> > Show the reset depth (the tasklet disable count) in the GEM_TRACE to
> > indicate when we might not expect tasklets to be flushed.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > ---
> >  drivers/gpu/drm/i915/intel_lrc.c | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> > index 178a74e29400..257d6f5f44d1 100644
> > --- a/drivers/gpu/drm/i915/intel_lrc.c
> > +++ b/drivers/gpu/drm/i915/intel_lrc.c
> > @@ -1834,7 +1834,8 @@ execlists_reset_prepare(struct intel_engine_cs *engine)
> >       struct i915_request *request, *active;
> >       unsigned long flags;
> >  
> > -     GEM_TRACE("%s\n", engine->name);
> > +     GEM_TRACE("%s: depth<-%d\n", engine->name,
> > +               atomic_read(&execlists->tasklet.count));
> 
> Interesting notation but yes, entry and exit will be visible.
> 
> I can't think of the details on a case when this would matter.
> Regardless, the knowledge of at what point we flushed or not
> is beneficial.

Grasping at straws trying to explain the trace and I wanted to rule out
that we were leaking the tasklet_disable(). For the record, we weren't.
-Chris
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