From: Patchwork <patchwork@emeril.freedesktop.org>
To: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value defines
Date: Fri, 17 Aug 2018 22:14:36 -0000 [thread overview]
Message-ID: <20180817221436.21068.57005@emeril.freedesktop.org> (raw)
In-Reply-To: <20180817215209.29133-1-paulo.r.zanoni@intel.com>
== Series Details ==
Series: series starting with [CI,1/2] drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value defines
URL : https://patchwork.freedesktop.org/series/48416/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4687 -> Patchwork_9976 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/48416/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_9976 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drv_selftest@live_coherency:
fi-gdg-551: PASS -> DMESG-FAIL (fdo#107164)
igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
{fi-byt-clapper}: PASS -> FAIL (fdo#103191, fdo#107362)
==== Possible fixes ====
igt@drv_selftest@live_hangcheck:
fi-cfl-s3: DMESG-FAIL (fdo#106560) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-a:
{fi-byt-clapper}: FAIL (fdo#107362) -> PASS
==== Warnings ====
{igt@kms_psr@primary_page_flip}:
fi-cnl-psr: DMESG-FAIL (fdo#107372) -> DMESG-WARN (fdo#107372)
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191
fdo#106560 https://bugs.freedesktop.org/show_bug.cgi?id=106560
fdo#107164 https://bugs.freedesktop.org/show_bug.cgi?id=107164
fdo#107362 https://bugs.freedesktop.org/show_bug.cgi?id=107362
fdo#107372 https://bugs.freedesktop.org/show_bug.cgi?id=107372
== Participating hosts (53 -> 48) ==
Missing (5): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-hsw-4200u
== Build changes ==
* Linux: CI_DRM_4687 -> Patchwork_9976
CI_DRM_4687: 437b1c598624454e36690c1c56ce1a27e2ed7893 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4606: 38a44003774e35c587c67c8766b35e75dbb993b8 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9976: 2e42167d8a4285878fa6df6b959733b4a2b88028 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2e42167d8a42 drm/i915/icl: Get DDI clock for ICL for MG PLL and TBT PLL
767af4b0f52e drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value defines
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9976/issues.html
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next prev parent reply other threads:[~2018-08-17 22:14 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-17 21:52 [CI 1/2] drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value defines Paulo Zanoni
2018-08-17 21:52 ` [CI 2/2] drm/i915/icl: Get DDI clock for ICL for MG PLL and TBT PLL Paulo Zanoni
2018-08-17 22:14 ` Patchwork [this message]
2018-08-17 23:32 ` ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value defines Patchwork
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