From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rodrigo Vivi Subject: Re: [PATCH] drm/i915/dsc: Fix PPS register definition macros for 2nd VDSC engine Date: Thu, 23 Aug 2018 23:07:27 -0700 Message-ID: <20180824060727.GO2190@intel.com> References: <20180824014807.14681-1-manasi.d.navare@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id C2FA76E61E for ; Fri, 24 Aug 2018 06:07:30 +0000 (UTC) Content-Disposition: inline In-Reply-To: <20180824014807.14681-1-manasi.d.navare@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Manasi Navare Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T24gVGh1LCBBdWcgMjMsIDIwMTggYXQgMDY6NDg6MDdQTSAtMDcwMCwgTWFuYXNpIE5hdmFyZSB3 cm90ZToKPiBUaGlzIHBhdGNoIGZpeGVzIHRoZSBQUFM0IGFuZCBQUFMgcmVnaXN0ZXIgZGVmaW5p dGlvbiBtYWNyb3MgdGhhdCB3ZXJlCj4gcmVzdWx0aW5nIGludG8gYW4gaW5jb3JlY3QgTU1JTyBh ZGRyZXNzLgo+IAo+IEZpeGVzOiAyZWZiYjJmMDk5ZmIgKCJpOTE1L2RwL2RzYzogQWRkIERTQyBQ UFMgcmVnaXN0ZXIgZGVmaW5pdGlvbnMiKQo+IENjOiBBbnVzaGEgU3JpdmF0c2EgPGFudXNoYS5z cml2YXRzYUBpbnRlbC5jb20+Cj4gU2lnbmVkLW9mZi1ieTogTWFuYXNpIE5hdmFyZSA8bWFuYXNp LmQubmF2YXJlQGludGVsLmNvbT4KClJldmlld2VkLWJ5OiBSb2RyaWdvIFZpdmkgPHJvZHJpZ28u dml2aUBpbnRlbC5jb20+CgooYWxzbyBjaGVja2VkIG90aGVycyBhcm91bmQgdG8gc2VlIGlmIHRo ZXJlIHdhcyBzaW1pbGFyIGlzc3VlcywKYnV0IHRoZSByZXN0IHNlZW1zIHJpZ2h0KQoKPiAtLS0K PiAgZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcuaCB8IDQgKystLQo+ICAxIGZpbGUgY2hh bmdlZCwgMiBpbnNlcnRpb25zKCspLCAyIGRlbGV0aW9ucygtKQo+IAo+IGRpZmYgLS1naXQgYS9k cml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkx NV9yZWcuaAo+IGluZGV4IDQxYWI1YjU2ZWU1Mi4uNjRkN2U2NzVmN2U4IDEwMDY0NAo+IC0tLSBh L2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVnLmgKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0v aTkxNS9pOTE1X3JlZy5oCj4gQEAgLTEwNDg4LDcgKzEwNDg4LDcgQEAgZW51bSBza2xfcG93ZXJf Z2F0ZSB7Cj4gIAkJCQkJCQkgICBfSUNMX0RTQzBfUElDVFVSRV9QQVJBTUVURVJfU0VUXzRfUEIs IFwKPiAgCQkJCQkJCSAgIF9JQ0xfRFNDMF9QSUNUVVJFX1BBUkFNRVRFUl9TRVRfNF9QQykKPiAg I2RlZmluZSBJQ0xfRFNDMV9QSUNUVVJFX1BBUkFNRVRFUl9TRVRfNChwaXBlKQlfTU1JT19QSVBF KChwaXBlKSAtIFBJUEVfQiwgXAo+IC0JCQkJCQkJICAgX0lDTF9EU0MwX1BJQ1RVUkVfUEFSQU1F VEVSX1NFVF80X1BCLCBcCj4gKwkJCQkJCQkgICBfSUNMX0RTQzFfUElDVFVSRV9QQVJBTUVURVJf U0VUXzRfUEIsIFwKPiAgCQkJCQkJCSAgIF9JQ0xfRFNDMV9QSUNUVVJFX1BBUkFNRVRFUl9TRVRf NF9QQykKPiAgI2RlZmluZSAgRFNDX0lOSVRJQUxfREVDX0RFTEFZKGRlY19kZWxheSkgICAgICAg KChkZWNfZGVsYXkpIDw8IDE2KQo+ICAjZGVmaW5lICBEU0NfSU5JVElBTF9YTUlUX0RFTEFZKHht aXRfZGVsYXkpICAgICAoKHhtaXRfZGVsYXkpIDw8IDApCj4gQEAgLTEwNTAzLDcgKzEwNTAzLDcg QEAgZW51bSBza2xfcG93ZXJfZ2F0ZSB7Cj4gIAkJCQkJCQkgICBfSUNMX0RTQzBfUElDVFVSRV9Q QVJBTUVURVJfU0VUXzVfUEIsIFwKPiAgCQkJCQkJCSAgIF9JQ0xfRFNDMF9QSUNUVVJFX1BBUkFN RVRFUl9TRVRfNV9QQykKPiAgI2RlZmluZSBJQ0xfRFNDMV9QSUNUVVJFX1BBUkFNRVRFUl9TRVRf NShwaXBlKQlfTU1JT19QSVBFKChwaXBlKSAtIFBJUEVfQiwgXAo+IC0JCQkJCQkJICAgX0lDTF9E U0MxX1BJQ1RVUkVfUEFSQU1FVEVSX1NFVF81X1BDLCBcCj4gKwkJCQkJCQkgICBfSUNMX0RTQzFf UElDVFVSRV9QQVJBTUVURVJfU0VUXzVfUEIsIFwKPiAgCQkJCQkJCSAgIF9JQ0xfRFNDMV9QSUNU VVJFX1BBUkFNRVRFUl9TRVRfNV9QQykKPiAgI2RlZmluZSAgRFNDX1NDQUxFX0RFQ19JTlQoc2Nh bGVfZGVjKQkoKHNjYWxlX2RlYykgPDwgMTYpCj4gICNkZWZpbmUgIERTQ19TQ0FMRV9JTkNfSU5U KHNjYWxlX2luYykJCSgoc2NhbGVfaW5jKSA8PCAwKQo+IC0tIAo+IDIuMTguMAo+IAo+IF9fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCj4gSW50ZWwtZ2Z4IG1h aWxpbmcgbGlzdAo+IEludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKPiBodHRwczovL2xp c3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeApfX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZnggbWFpbGluZyBs aXN0CkludGVsLWdmeEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVz a3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9pbnRlbC1nZngK