From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH v5 11/13] drm/i915/icl: Add macros for MMIO of DSI transcoder registers Date: Wed, 12 Sep 2018 21:00:21 +0300 Message-ID: <20180912180021.GH5565@intel.com> References: <1531215614-6828-1-git-send-email-madhav.chauhan@intel.com> <1531215614-6828-12-git-send-email-madhav.chauhan@intel.com> <20180719162241.GE5565@intel.com> <2b6bcd05-0448-023c-19e1-d8be9f190690@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4304E89152 for ; Wed, 12 Sep 2018 18:00:29 +0000 (UTC) Content-Disposition: inline In-Reply-To: <2b6bcd05-0448-023c-19e1-d8be9f190690@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Madhav Chauhan Cc: Jani Nikula , intel-gfx@lists.freedesktop.org, paulo.r.zanoni@intel.com, rodrigo.vivi@intel.com List-Id: intel-gfx@lists.freedesktop.org T24gV2VkLCBTZXAgMTIsIDIwMTggYXQgMDM6MDY6NDFQTSArMDUzMCwgTWFkaGF2IENoYXVoYW4g d3JvdGU6Cj4gT24gNy8xOS8yMDE4IDk6NTIgUE0sIFZpbGxlIFN5cmrDpGzDpCB3cm90ZToKPiA+ IE9uIFR1ZSwgSnVsIDEwLCAyMDE4IGF0IDAzOjEwOjEyUE0gKzA1MzAsIE1hZGhhdiBDaGF1aGFu IHdyb3RlOgo+ID4+IFRoaXMgcGF0Y2ggYWRkcyBfTU1JT19EU0kgYW5kIF9EU0lfVFJBTlMgbWFj cm9zIGZvciBhY2Nlc3NpbmcKPiA+PiBEU0kgdHJhbnNjb2RlciByZWdpc3RlcnMuCj4gPj4KPiA+ PiBDcmVkaXRzLXRvOiBKYW5pIE4KPiA+Pgo+ID4+IENjOiBKYW5pIE5pa3VsYSA8amFuaS5uaWt1 bGFAaW50ZWwuY29tPgo+ID4+IFNpZ25lZC1vZmYtYnk6IE1hZGhhdiBDaGF1aGFuIDxtYWRoYXYu Y2hhdWhhbkBpbnRlbC5jb20+Cj4gPj4gLS0tCj4gPj4gICBkcml2ZXJzL2dwdS9kcm0vaTkxNS9p OTE1X3JlZy5oIHwgNSArKysrKwo+ID4+ICAgMSBmaWxlIGNoYW5nZWQsIDUgaW5zZXJ0aW9ucygr KQo+ID4+Cj4gPj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVnLmgg Yi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oCj4gPj4gaW5kZXggMWQxM2JhOS4uNjJi Yzc2ZSAxMDA2NDQKPiA+PiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oCj4g Pj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcuaAo+ID4+IEBAIC05NTc2LDYg Kzk1NzYsMTEgQEAgZW51bSBza2xfcG93ZXJfZ2F0ZSB7Cj4gPj4gICAjZGVmaW5lIF9NSVBJX1BP UlQocG9ydCwgYSwgYykJKCgocG9ydCkgPT0gUE9SVF9BKSA/IGEgOiBjKQkvKiBwb3J0cyBBIGFu ZCBDIG9ubHkgKi8KPiA+PiAgICNkZWZpbmUgX01NSU9fTUlQSShwb3J0LCBhLCBjKQlfTU1JTyhf TUlQSV9QT1JUKHBvcnQsIGEsIGMpKQo+ID4+ICAgCj4gPj4gKy8qIGdlbjExIERTSSAqLwo+ID4+ ICsjZGVmaW5lIF9EU0lfVFJBTlModGMsIGRzaTAsIGRzaTEpCSgoKHRjKSA9PSBUUkFOU0NPREVS X0RTSV8wKSA/CVwKPiA+PiArCQkJCQkgKGRzaTApIDogKGRzaTEpKQo+ID4gX1BJUEUoKSBldGMu IHNob3VsZCByZXN1bHQgaW4gc2x1Z2h0bHkgYmV0dGVyIGNvZGUgSUlSQy4KPiAKPiBDYW4geW91 IHBsZWFzZSBjbGFyaWZ5IG9uIHRoaXM/PwoKUGxlbnR5IG9mIGV4YW1wbGVzIGluIGk5MTVfcmVn LmggZm9yIHVzaW5nIF9QSVBFKCkuCgo+IAo+IFJlZ2FyZHMsCj4gTWFkaGF2Cj4gCj4gPgo+ID4+ ICsjZGVmaW5lIF9NTUlPX0RTSSh0YywgZHNpMCwgZHNpMSkJX01NSU8oX0RTSV9UUkFOUyh0Yywg ZHNpMCwgZHNpMSkpCj4gPj4gKwo+ID4+ICAgI2RlZmluZSBNSVBJT19UWEVTQ19DTEtfRElWMQkJ CV9NTUlPKDB4MTYwMDA0KQo+ID4+ICAgI2RlZmluZSAgR0xLX1RYX0VTQ19DTEtfRElWMV9NQVNL CQkJMHgzRkYKPiA+PiAgICNkZWZpbmUgTUlQSU9fVFhFU0NfQ0xLX0RJVjIJCQlfTU1JTygweDE2 MDAwOCkKPiA+PiAtLSAKPiA+PiAyLjcuNAo+ID4+Cj4gPj4gX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX18KPiA+PiBJbnRlbC1nZnggbWFpbGluZyBsaXN0Cj4g Pj4gSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwo+ID4+IGh0dHBzOi8vbGlzdHMuZnJl ZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4CgotLSAKVmlsbGUgU3lyasOk bMOkCkludGVsCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f CkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpo dHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo=