Re: [PATCH 3/3] drm/i915: Remove HAS_FULL_PPGTT and device_info.ppgtt enum (v2)

kbuild test robot
2018-11-08T12:22:24Z

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Hi Bob,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20181107]
[cannot apply to v4.20-rc1]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url: https://github.com/0day-ci/linux/commits/Bob-Paauwe/drm-i915-Make-48bit-full-ppgtt-configuration-generic-v9/20181108-104436
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-allmodconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/i915/gvt/vgpu.c:47:50: error: undefined identifier 'VGT_CAPS_4LVL_PPGTT'
drivers/gpu/drm/i915/gvt/vgpu.c: In function 'populate_pvinfo_page':
drivers/gpu/drm/i915/gvt/vgpu.c:47:43: error: 'VGT_CAPS_4LVL_PPGTT' undeclared (first use in this function); did you mean 'VGT_CAPS_FULL_PPGTT'?
vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_4LVL_PPGTT;
^~~~~~~~~~~~~~~~~~~
VGT_CAPS_FULL_PPGTT
drivers/gpu/drm/i915/gvt/vgpu.c:47:43: note: each undeclared identifier is reported only once for each function it appears in

vim +/VGT_CAPS_4LVL_PPGTT +47 drivers/gpu/drm/i915/gvt/vgpu.c

82d375d1 Zhi Wang 2016-07-05 37
23736d1b Ping Gao 2016-10-26 38 void populate_pvinfo_page(struct intel_vgpu *vgpu)
82d375d1 Zhi Wang 2016-07-05 39 {
82d375d1 Zhi Wang 2016-07-05 40 /* setup the ballooning information */
90551a12 Zhenyu Wang 2017-12-19 41 vgpu_vreg64_t(vgpu, vgtif_reg(magic)) = VGT_MAGIC;
90551a12 Zhenyu Wang 2017-12-19 42 vgpu_vreg_t(vgpu, vgtif_reg(version_major)) = 1;
90551a12 Zhenyu Wang 2017-12-19 43 vgpu_vreg_t(vgpu, vgtif_reg(version_minor)) = 0;
90551a12 Zhenyu Wang 2017-12-19 44 vgpu_vreg_t(vgpu, vgtif_reg(display_ready)) = 0;
90551a12 Zhenyu Wang 2017-12-19 45 vgpu_vreg_t(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
a2ae95af Weinan Li 2017-10-20 46
a449bba0 Bob Paauwe 2018-11-07 @47 vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) = VGT_CAPS_4LVL_PPGTT;
90551a12 Zhenyu Wang 2017-12-19 48 vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HWSP_EMULATION;
aa36ed6d Changbin Du 2018-05-15 49 vgpu_vreg_t(vgpu, vgtif_reg(vgt_caps)) |= VGT_CAPS_HUGE_GTT;
a2ae95af Weinan Li 2017-10-20 50
90551a12 Zhenyu Wang 2017-12-19 51 vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
82d375d1 Zhi Wang 2016-07-05 52 vgpu_aperture_gmadr_base(vgpu);
90551a12 Zhenyu Wang 2017-12-19 53 vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.mappable_gmadr.size)) =
82d375d1 Zhi Wang 2016-07-05 54 vgpu_aperture_sz(vgpu);
90551a12 Zhenyu Wang 2017-12-19 55 vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.base)) =
82d375d1 Zhi Wang 2016-07-05 56 vgpu_hidden_gmadr_base(vgpu);
90551a12 Zhenyu Wang 2017-12-19 57 vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.size)) =
82d375d1 Zhi Wang 2016-07-05 58 vgpu_hidden_sz(vgpu);
82d375d1 Zhi Wang 2016-07-05 59
90551a12 Zhenyu Wang 2017-12-19 60 vgpu_vreg_t(vgpu, vgtif_reg(avail_rs.fence_num)) = vgpu_fence_sz(vgpu);
82d375d1 Zhi Wang 2016-07-05 61
1c6ccad8 Tina Zhang 2018-05-14 62 vgpu_vreg_t(vgpu, vgtif_reg(cursor_x_hot)) = UINT_MAX;
1c6ccad8 Tina Zhang 2018-05-14 63 vgpu_vreg_t(vgpu, vgtif_reg(cursor_y_hot)) = UINT_MAX;
1c6ccad8 Tina Zhang 2018-05-14 64
82d375d1 Zhi Wang 2016-07-05 65 gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id);
82d375d1 Zhi Wang 2016-07-05 66 gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n",
82d375d1 Zhi Wang 2016-07-05 67 vgpu_aperture_gmadr_base(vgpu), vgpu_aperture_sz(vgpu));
82d375d1 Zhi Wang 2016-07-05 68 gvt_dbg_core("hidden base [GMADR] 0x%llx size=0x%llx\n",
82d375d1 Zhi Wang 2016-07-05 69 vgpu_hidden_gmadr_base(vgpu), vgpu_hidden_sz(vgpu));
82d375d1 Zhi Wang 2016-07-05 70 gvt_dbg_core("fence size %d\n", vgpu_fence_sz(vgpu));
82d375d1 Zhi Wang 2016-07-05 71
82d375d1 Zhi Wang 2016-07-05 72 WARN_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
82d375d1 Zhi Wang 2016-07-05 73 }
82d375d1 Zhi Wang 2016-07-05 74

:::::: The code at line 47 was first introduced by commit
:::::: a449bba075f4efa6186f8c3930a11100d0185740 drm/i915: Make 48bit full ppgtt configuration generic (v9)

:::::: TO: Bob Paauwe <bob.j.paauwe@intel.com>
:::::: CC: 0day robot <lkp@intel.com>

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